bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	Adding -verify-machineinstrs option to PowerPC tests	Ehsan Amiri	2016-08-03	1	-1/+1
\| \| \| \| \| \| \| \| \| \| \|	Currently we have a number of tests that fail with -verify-machineinstrs. To detect this cases earlier we add the option to the testcases with the exception of tests that will currently fail with this option. PR 27456 keeps track of this failures. No code review, as discussed with Hal Finkel. llvm-svn: 277624
*	[PowerPC] Cleanup test/CodeGen/PowerPC/qpx-load-splat.ll	Hal Finkel	2016-03-31	1	-14/+6
\| \| \| \| \| \|	Removing unnecessary attributes and metadata... llvm-svn: 265049
*	[PowerPC] Add a late MI-level pass for QPX load/splat simplification	Hal Finkel	2016-03-31	1	-0/+83
	Chapter 3 of the QPX manual states that, "Scalar floating-point load instructions, defined in the Power ISA, cause a replication of the source data across all elements of the target register." Thus, if we have a load followed by a QPX splat (from the first lane), the splat is redundant. This adds a late MI-level pass to remove the redundant splats in some of these cases (specifically when both occur in the same basic block). This optimization is scheduled just prior to post-RA scheduling. It can't happen before anything that might replace the load with some already-computed quantity (i.e. store-to-load forwarding). llvm-svn: 265047