| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [mips][msa] MSA requires FR=1 mode (64-bit FPU register file). Report fatal ↵ | Daniel Sanders | 2013-09-27 | 1 | -1/+1 |
| | | | | | | | error when using it in FR=0 mode. llvm-svn: 191498 | ||||
| * | [mips][msa] Added cfcmsa, and ctcmsa | Daniel Sanders | 2013-08-28 | 1 | -0/+167 |
| The MSA control registers have been added as reserved registers, and are only used via ISD::Copy(To|From)Reg. The intrinsics are lowered into these nodes. llvm-svn: 189468 | |||||
 |
index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
| summaryrefslogtreecommitdiffstats |
|