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* [mips] interAptiv based generic schedule modelSimon Dardis2016-09-011-10/+10
| | | | | | | | | | | This scheduler describes a processor which covers all MIPS ISAs based around the interAptiv and P5600 timings. Reviewers: vkalintiris, dsanders Differential Revision: https://reviews.llvm.org/D23551 llvm-svn: 280374
* [mips] Preparatory work for a generic schedulerSimon Dardis2016-08-241-6/+6
| | | | | | | | | | | | | Extend instruction definitions from nearly all ISAs to include appropriate instruction itineraries. Change MIPS16s gp prologue generation to use real instructions instead of using a pseudo instruction. Reviewers: dsanders, vkalintiris Differential Review: https://reviews.llvm.org/D23548 llvm-svn: 279623
* [mips] Optimize materialization of i64 constantsSimon Dardis2016-07-251-2/+2
| | | | | | | | | | | | | | | | | Avoid MipsAnalyzeImmediate usage if the constant fits in an 32-bit integer. This allows us to generate the same instructions for the materialization of the same constants regardless the width of their type. Patch by: Vasileios Kalintiris Contributions by: Simon Dardis Reviewers: Daniel Sanders Differential Review: https://reviews.llvm.org/D21689 llvm-svn: 276628
* [mips] Use --check-prefixes where appropriate. NFC.Daniel Sanders2016-06-241-16/+16
| | | | llvm-svn: 273669
* [mips] Don't derive the default ABI from the CPU in the backend.Daniel Sanders2016-06-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Summary: The backend has no reason to behave like a driver and should generally do as it's told (and error out if it can't) instead of trying to figure out what the API user meant. The default ABI is still derived from the arch component as a concession to backwards compatibility. API-users that previously passed an explicit CPU and a triple that was inconsistent with the CPU (e.g. mips-linux-gnu and mips64r2) may get a different ABI to what they got before. However, it's expected that there are no such users on the basis that CodeGen has been asserting that the triple is consistent with the selected ABI for several releases. API-users that were consistent or passed '' or 'generic' as the CPU will see no difference. Reviewers: sdardis, rafael Subscribers: rafael, dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D21466 llvm-svn: 273557
* [mips] MIPS32/64 itinerariesSimon Dardis2016-06-141-7/+7
| | | | | | | | | | | Itineraries for some pre MIPSR6 and EVA instructions. Some pseudo expanded instructions are marked as having no scheduling info. Reviewers: dsanders, vkalintiris Differential Review: http://reviews.llvm.org/D20418 llvm-svn: 272648
* [mips][microMIPS] Add CodeGen support for ADD, ADDIU*, ADDU* and DADD* ↵Zlatko Buljan2016-04-081-8/+317
| | | | | | | | instructions Differential Revision: http://reviews.llvm.org/D16454 llvm-svn: 265772
* [mips] Add backend support for Mips32r[35] and Mips64r[35].Daniel Sanders2015-02-181-0/+8
| | | | | | | | | | | | | | | | | Summary: These ISA's didn't add any instructions so they are almost identical to Mips32r2 and Mips64r2. Even the ELF e_flags are the same, However the ISA revision in .MIPS.abiflags is 3 or 5 respectively instead of 2. Reviewers: vmedic Reviewed By: vmedic Subscribers: tomatabacu, llvm-commits, atanasyan Differential Revision: http://reviews.llvm.org/D7381 llvm-svn: 229695
* [mips] Enable arithmetic and binary operations for the i128 data type.Vasileios Kalintiris2015-01-261-0/+30
| | | | | | | | | | | | | | | | | | Summary: This patch adds support for some operations that were missing from 128-bit integer types (add/sub/mul/sdiv/udiv... etc.). With these changes we can support the __int128_t and __uint128_t data types from C/C++. Depends on D7125 Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7143 llvm-svn: 227089
* [mips] Add tests for bitwise binary and integer arithmetic operators.Vasileios Kalintiris2015-01-261-0/+85
| | | | | | | | | | Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7125 llvm-svn: 227087
* Revert "[mips] Fix assertion on i128 addition/subtraction on MIPS64"Vasileios Kalintiris2015-01-261-95/+0
| | | | | | | | This reverts commit r227003. Support for addition/subtraction and various other operations for the i128 data type will be added in a future commit based on the review D7143. llvm-svn: 227082
* [mips] Fix assertion on i128 addition/subtraction on MIPS64Daniel Sanders2015-01-241-0/+95
Summary: In addition to the included tests, this fixes test/CodeGen/Generic/i128-addsub.ll on a mips64 host. Reviewers: atanasyan, sagar, vmedic Reviewed By: vmedic Subscribers: sdkie, llvm-commits Differential Revision: http://reviews.llvm.org/D6610 llvm-svn: 227003
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