| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. | Daniel Sanders | 2015-10-15 | 1 | -1/+1 |
| * | [opaque pointer type] Add textual IR support for explicit type parameter to t... | David Blaikie | 2015-04-16 | 1 | -2/+2 |
| * | [opaque pointer type] Add textual IR support for explicit type parameter to g... | David Blaikie | 2015-03-13 | 1 | -2/+2 |
| * | Check in conditional branches for constant islands. Still need to finish | Reed Kotler | 2013-11-28 | 1 | -1/+1 |
| * | For Mips16, start to consolidate all forms of 32 bit literal loading so that | Reed Kotler | 2013-10-12 | 1 | -6/+13 |
| * | implement large (>16 bit) constant loading. | Reed Kotler | 2012-10-26 | 1 | -0/+17 |

