| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [X86] Merge the different Jcc instructions for each condition code into singl... | Craig Topper | 2019-04-05 | 1 | -4/+4 |
| * | Followup on Proposal to move MIR physical register namespace to '$' sigil. | Puyan Lotfi | 2018-01-31 | 1 | -12/+12 |
| * | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih | 2017-12-04 | 1 | -3/+3 |
| * | llc: Add support for -run-pass none | Matthias Braun | 2016-07-16 | 1 | -1/+1 |
| * | [MIR] Print on the given output instead of stderr. | Quentin Colombet | 2016-07-13 | 1 | -1/+1 |
| * | When printing MIR, output to errs() rather than outs(). | Justin Lebar | 2016-02-19 | 1 | -1/+1 |
| * | MIR Serialization: Change MIR syntax - use custom syntax for MBBs. | Alex Lorenz | 2015-08-13 | 1 | -37/+33 |
| * | MIR Tests: Add liveins and successors to make tests pass with machine verifier. | Alex Lorenz | 2015-07-24 | 1 | -0/+2 |
| * | MIR Parser: Verify the implicit machine register operands. | Alex Lorenz | 2015-07-07 | 1 | -6/+6 |
| * | MIR Serialization: Serialize machine basic block operands. | Alex Lorenz | 2015-06-26 | 1 | -0/+75 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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