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path: root/llvm/test/CodeGen/ARM/vcvt.ll
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* [SDAG] Move TRUNCATE splitting logic into a helper, and useJames Molloy2015-03-311-2/+2
| | | | | | | | | | | it more liberally. SplitVecOp_TRUNCATE has logic for recursively splitting oversize vectors that need more than one round of splitting to become legal. There are many other ISD nodes that could benefit from this logic, so factor it out and use it for FP_TO_UINT,FP_TO_SINT,SINT_TO_FP,UINT_TO_FP and FTRUNC. llvm-svn: 233681
* [opaque pointer type] Add textual IR support for explicit type parameter to ↵David Blaikie2015-02-271-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
* ARM: fixup more tests to specify the target more explicitlySaleem Abdulrasool2014-04-031-1/+1
| | | | | | | | | | | | | This changes the tests that were targeting ARM EABI to explicitly specify the environment rather than relying on the default. This breaks with the new Windows on ARM support when running the tests on Windows where the default environment is no longer EABI. Take the opportunity to avoid a pointless redirect (helps when trying to debug with providing a command line invocation which can be copy and pasted) and removing a few greps in favour of FileCheck. llvm-svn: 205541
* Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to ↵Stephen Lin2013-07-141-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
* ARM: ensure fixed-point conversions have sane typesTim Northover2013-06-281-0/+41
| | | | | | | | | | | We were generating intrinsics for NEON fixed-point conversions that didn't exist (e.g. float -> i16). There are two cases to consider: + iN is smaller than float. In this case we can do the conversion but need an extend or truncate as well. + iN is larger than float. In this case using the NEON conversion would be incorrect so we don't perform any combining. llvm-svn: 185158
* ARM: Split out cost model vcvt testcases.Jim Grosbach2013-04-211-172/+0
| | | | | | They had a separate RUN line already, so may as well be in a separate file. llvm-svn: 179988
* Improve long vector sext/zext lowering on ARMRenato Golin2013-03-191-52/+71
| | | | | | | | | | | | | The ARM backend currently has poor codegen for long sext/zext operations, such as v8i8 -> v8i32. This patch addresses this by performing a custom expansion in ARMISelLowering. It also adds/changes the cost of such lowering in ARMTTI. This partially addresses PR14867. Patch by Pete Couperus llvm-svn: 177380
* ARM cost model: Add test case to make sure we would notice a change in CodeGenArnold Schwaighofer2013-03-131-0/+153
| | | | | | | | | | In r176898 I updated the cost model to reflect the fact that sext/zext/cast on v8i32 <-> v8i8 and v16i32 <-> v16i8 are expensive. This test case is so that we make sure to update the cost model once we fix CodeGen. llvm-svn: 176955
* Add Neon VCVT instructions for f32 <-> f16 conversions.Bob Wilson2010-12-151-1/+19
| | | | | | | Clang is now providing intrinsics for these and so we need to support them in the backend. Radar 8068427. llvm-svn: 121902
* Merge a bunch of NEON tests into larger files so they run faster.Bob Wilson2009-10-091-0/+75
| | | | llvm-svn: 83667
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-091-1/+1
| | | | llvm-svn: 81293
* Convert some more Neon tests to FileCheck.Bob Wilson2009-08-261-5/+17
| | | | llvm-svn: 80120
* Add support for ARM's Advanced SIMD (NEON) instruction set.Bob Wilson2009-06-221-0/+53
This is still a work in progress but most of the NEON instruction set is supported. llvm-svn: 73919
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