summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/ARM/vbsl.ll
Commit message (Collapse)AuthorAgeFilesLines
* ARM: v1i64 and v2i64 VBSL intrinsic support.Jim Grosbach2012-10-151-0/+30
| | | | | | rdar://12502028 llvm-svn: 165981
* Add isel patterns for v2f32 / v4f32 neon.vbsl intrinsics. rdar://12471808Evan Cheng2012-10-101-0/+18
| | | | llvm-svn: 165673
* ARM: Use a dedicated intrinsic for vector bitwise select.Jim Grosbach2012-09-211-0/+49
| | | | | | | | | | | The expression based expansion too often results in IR level optimizations splitting the intermediate values into separate basic blocks, preventing the formation of the VBSL instruction as the code author intended. In particular, LICM would often hoist part of the computation out of a loop. rdar://11011471 llvm-svn: 164340
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-091-1/+1
| | | | llvm-svn: 81293
* Convert more Neon tests to use FileCheck.Bob Wilson2009-08-071-3/+17
| | | | llvm-svn: 78433
* Add support for ARM's Advanced SIMD (NEON) instruction set.Bob Wilson2009-06-221-0/+91
This is still a work in progress but most of the NEON instruction set is supported. llvm-svn: 73919
OpenPOWER on IntegriCloud