| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [SelectionDAG] Add support for BITREVERSE constant folding | Simon Pilgrim | 2017-01-16 | 1 | -1/+2 |
| | | | | | | | We were relying on constant folding of the legalized instructions to do what constant folding we had previously llvm-svn: 292114 | ||||
| * | [ARM] Replace ARMISD::RBIT with ISD::BITREVERSE | James Molloy | 2015-11-13 | 1 | -0/+11 |
| | | | | | | | ISD::BITREVERSE matches "rbit" completely, so remove ARMISD::RBIT and mark ISD::BITREVERSE as legal, adding a test for lowering. llvm-svn: 253047 | ||||
| * | ARM: Fix codegen for rbit intrinsic | Yi Kong | 2014-08-20 | 1 | -0/+20 |
| LLVM generates illegal `rbit r0, #352` instruction for rbit intrinsic. According to ARM ARM, rbit only takes register as argument, not immediate. The correct instruction should be rbit <Rd>, <Rm>. The bug was originally introduced in r211057. Differential Revision: http://reviews.llvm.org/D4980 llvm-svn: 216064 | |||||

