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* CSE: allow PerformTrivialCoalescing to check copies across basic blockManman Ren2012-11-271-0/+32
| | | | | | | | | | | | | | | | boundaries. Given the following case: BB0 %vreg1<def> = SUBrr %vreg0, %vreg7 %vreg2<def> = COPY %vreg7 BB1 %vreg10<def> = SUBrr %vreg0, %vreg2 We should be able to CSE between SUBrr in BB0 and SUBrr in BB1. rdar://12462006 llvm-svn: 168717
* Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr.Jakob Stoklund Olesen2012-04-041-1/+1
| | | | | | | | | | A MOVCCr instruction can be commuted by inverting the condition. This can help reduce register pressure and remove unnecessary copies in some cases. <rdar://problem/11182914> llvm-svn: 154033
* Allow machine-cse to look across MBB boundary when cse'ing instructions thatEvan Cheng2012-01-101-1/+30
| | | | | | | | | | define physical registers. It's currently very restrictive, only catching cases where the CE is in an immediate (and only) predecessor. But it catches a surprising large number of cases. rdar://10660865 llvm-svn: 147827
* Re-apply 105308 with fix.Evan Cheng2010-06-041-0/+18
| | | | llvm-svn: 105502
* Revert 105308.Bob Wilson2010-06-031-18/+0
| | | | llvm-svn: 105399
* Enable machine cse of instructions which define physical registers.Evan Cheng2010-06-021-0/+18
llvm-svn: 105308
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