Commit message (Collapse) | Author | Age | Files | Lines | |
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* | RegAlloc superpass: includes phi elimination, coalescing, and scheduling. | Andrew Trick | 2012-02-10 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. llvm-svn: 150226 | ||||
* | Switch a few tests off linearscan. | Jakob Stoklund Olesen | 2011-11-12 | 1 | -1/+1 |
| | | | | llvm-svn: 144460 | ||||
* | Fix run-line, again. :( | Eli Friedman | 2011-04-29 | 1 | -1/+1 |
| | | | | llvm-svn: 130540 | ||||
* | Re-committing r130454, which does not in fact break anything. | Eli Friedman | 2011-04-29 | 1 | -0/+11 |
| | | | | | | | Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register. rdar://problem/9338332 . llvm-svn: 130539 | ||||
* | Revert r130454; apparently this doesn't actually work. | Eli Friedman | 2011-04-28 | 1 | -11/+0 |
| | | | | llvm-svn: 130462 | ||||
* | Fix runline. | Eli Friedman | 2011-04-28 | 1 | -1/+1 |
| | | | | llvm-svn: 130455 | ||||
* | Fix a rather obscure crash caused by ARM fast-isel generating code which ↵ | Eli Friedman | 2011-04-28 | 1 | -0/+11 |
redefines a register. rdar://problem/9338332 . llvm-svn: 130454 |