Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | ARM: treat [N x i32] and [N x i64] as AAPCS composite types | Tim Northover | 2015-02-24 | 1 | -0/+101 |
The logic is almost there already, with our special homogeneous aggregate handling. Tweaking it like this allows front-ends to emit AAPCS compliant code without ever having to count registers or add discarded padding arguments. Only arrays of i32 and i64 are needed to model AAPCS rules, but I decided to apply the logic to all integer arrays for more consistency. llvm-svn: 230348 |