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* AMDGPU/SI: Add debugging subtarget feature for DS offsetsMatt Arsenault2015-07-061-2/+3
| | | | | | | | We don't have a good way to detect most situations where DS offsets are usable on SI, so add an option to force using them even if unsafe for debugging performance problems. llvm-svn: 241462
* Test for specific output in lit testMatthias Braun2015-07-011-1/+18
| | | | llvm-svn: 241200
* RegisterCoalescer: Cleanup empty subranges after shrinkToUses()Matthias Braun2015-06-301-0/+20
| | | | | | | | A call to removeEmptySubranges() is necessary after every operation that potentially removes all segments from a subregister range; this case in the register coalescer was missing. llvm-svn: 241027
* AMDGPU/SI: Fix extra space when printing v_div_fmas_*Matt Arsenault2015-06-281-2/+2
| | | | llvm-svn: 240911
* AMDPGU/SI: Use correct resource descriptors for VI on HSATom Stellard2015-06-261-3/+8
| | | | | | | | | | Summary: We need to set MTYPE = 2 for VI shaders when targeting the HSA runtime. Reviewers: arsenm Differential Revision: http://reviews.llvm.org/D10777 llvm-svn: 240841
* AMDGPU/SI: Update amd_kernel_code_t definition and add assembler supportTom Stellard2015-06-261-4/+2
| | | | | | | | | | Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10772 llvm-svn: 240839
* AMDGPU/SI: Set ELF OS/ABI to ELFOSABI_AMDGPU_HSATom Stellard2015-06-261-0/+1
| | | | | | | | | | Reviewers: arsenm, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10708 llvm-svn: 240832
* AMDGPU/SI: Add hsa code object directivesTom Stellard2015-06-261-0/+15
| | | | | | | | | | Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10757 llvm-svn: 240831
* AMDGPU/SI: There are no implicit kernel args in the amdhsa ABITom Stellard2015-06-261-0/+1
| | | | | | | | | | Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10706 llvm-svn: 240830
* AMDGPU/SI: Emit amd_kernel_code_t in EmitFunctionBodyStart()Tom Stellard2015-06-261-1/+3
| | | | | | | | | | | | | | Summary: This way the function symbol points to the start of amd_kernel_code_t rather than the start of the function. Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10705 llvm-svn: 240829
* AMDGPU: really don't commute REV opcodes if the target variant doesn't existMarek Olsak2015-06-261-0/+33
| | | | | | | | | | | | | | If pseudoToMCOpcode failed, we would return the original opcode, so operands would be swapped, but the instruction would remain the same. It resulted in LSHLREV a, b ---> LSHLREV b, a. This fixes Glamor text rendering and piglit/arb_sample_shading-builtin-gl-sample-mask on VI. This is a candidate for stable branches. v2: the test was simplified by Tom Stellard llvm-svn: 240824
* R600/SI: Use ELF64 format instead of ELF32Tom Stellard2015-06-221-1/+1
| | | | | | | | | | Reviewers: arsenm, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10392 llvm-svn: 240331
* R600: Use EM_AMDGPU for the ELF Machine typeTom Stellard2015-06-221-4/+5
| | | | | | | | | | Reviewers: arsenm, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10390 llvm-svn: 240330
* Fix "the the" in comments.Eric Christopher2015-06-191-1/+1
| | | | llvm-svn: 240112
* Revert "Revert "Fix merges of non-zero vector stores""Matt Arsenault2015-06-161-2/+99
| | | | | | | | Reapply r239539. Don't assume the collected number of stores is the same vector size. Just take the first N stores to fill the vector. llvm-svn: 239825
* R600 -> AMDGPU renameTom Stellard2015-06-13400-0/+45283
llvm-svn: 239657
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