| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | AMDGPU: Distribute SGPR->VGPR copies of REG_SEQUENCE | Matt Arsenault | 2015-11-02 | 1 | -9/+7 |
| | | | | | | | | Make the REG_SEQUENCE be a VGPR, and do the register class copy first. llvm-svn: 251855 | ||||
| * | PeepholeOptimizer: Remove redundant copies | Matt Arsenault | 2015-09-25 | 1 | -22/+37 |
| | | | | | | | | | | | | | If a virtual register is copied and another copy was already seen, replace with the previous copy. This only handles the simplest cases for now. This pattern shows up from various operand restrictions AMDGPU has which require inserting copies depending on the register class of the operands. llvm-svn: 248611 | ||||
| * | AMDGPU: Add some more tests for literal operands | Matt Arsenault | 2015-09-25 | 1 | -0/+154 |
| | | | | | llvm-svn: 248600 | ||||
| * | R600 -> AMDGPU rename | Tom Stellard | 2015-06-13 | 1 | -0/+103 |
| llvm-svn: 239657 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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