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* [AMDGPU] Remove FeatureVGPRSpillingScott Linder2018-10-311-2/+2
| | | | | | | | | | | This feature is only relevant to shaders, and is no longer used. When disabled, lowering of reserved registers for shaders causes a compiler crash. Remove the feature and add a test for compilation of shaders at OptNone. Differential Revision: https://reviews.llvm.org/D53829 llvm-svn: 345763
* AMDGPU: Fix tests using old number for constant address spaceMatt Arsenault2018-09-101-16/+16
| | | | llvm-svn: 341770
* AMDGPU/R600: Replace barrier intrinsicsMatt Arsenault2016-07-181-25/+22
| | | | llvm-svn: 275870
* AMDGPU: Add a shader calling conventionNicolai Haehnle2016-04-061-3/+1
| | | | | | | | | | | This makes it possible to distinguish between mesa shaders and other kernels even in the presence of compute shaders. Patch By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Differential Revision: http://reviews.llvm.org/D18559 llvm-svn: 265589
* AMDGPU: Switch barrier intrinsics to using convergentMatt Arsenault2015-12-191-1/+1
| | | | | | | | noduplicate prevents unrolling of small loops that happen to have barriers in them. If a loop has a barrier in it, it is OK to duplicate it for the unroll. llvm-svn: 256075
* R600 -> AMDGPU renameTom Stellard2015-06-131-0/+163
llvm-svn: 239657
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