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* AMDGPU: Bring processors and features in sync with the specKonstantin Zhuravlyov2018-02-161-2/+2
| | | | | | | | | | - Remove gfx800 - Make iceland gfx802 - Add xnack to gfx902 Differential Revision: https://reviews.llvm.org/D43355 llvm-svn: 325393
* AMDGPU: Select DS insts without m0 initializationMatt Arsenault2017-11-291-1/+1
| | | | | | | | | GFX9 stopped using m0 for most DS instructions. Select a different instruction without the use. I think this will be less error prone than trying to manually maintain m0 uses as needed. llvm-svn: 319270
* Fix APInt bit size in processDbgDeclaresYaxun Liu2017-11-161-10/+11
| | | | | | | | | | | | | processDbgDeclares assumes pointer size is the same for different addr spaces. It uses pointer size for addr space 0 for all pointers, which causes assertion in stripAndAccumulateInBoundsConstantOffsets for amdgcn---amdgiz since pointer in addr space 5 has different size than in addr space 0. This patch fixes that. Differential Revision: https://reviews.llvm.org/D40085 llvm-svn: 318370
* AMDGPU: Bring HSA metadata on par with the specificationKonstantin Zhuravlyov2017-10-141-1/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D38753 llvm-svn: 315821
* llvm-readobj: Print AMDGPU note contentsKonstantin Zhuravlyov2017-10-141-4/+4
| | | | | | Differential Revision: https://reviews.llvm.org/D38752 llvm-svn: 315819
* AMDGPU/NFC: Rename code object metadata as HSA metadataKonstantin Zhuravlyov2017-10-111-0/+69
- Rename AMDGPUCodeObjectMetadata to AMDGPUMetadata (PAL metadata will be included in this file in the follow up change) - Rename AMDGPUCodeObjectMetadataStreamer to AMDGPUHSAMetadataStreamer - Introduce HSAMD namespace - Other minor name changes in function and test names llvm-svn: 315522
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