Commit message (Collapse) | Author | Age | Files | Lines | |
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* | AMDGPU: Add sdst operand to VOP2b instructions | Matt Arsenault | 2015-08-29 | 1 | -4/+4 |
| | | | | | | | | | | The VOP3 encoding of these allows any SGPR pair for the i1 output, but this was forced before to always use vcc. This doesn't yet try to use this, but does add the operand to the definitions so the main change is adding vcc to the output of the VOP2 encoding. llvm-svn: 246358 | ||||
* | AMDGPU/SI: Add debugging subtarget feature for DS offsets | Matt Arsenault | 2015-07-06 | 1 | -2/+3 |
| | | | | | | | | We don't have a good way to detect most situations where DS offsets are usable on SI, so add an option to force using them even if unsafe for debugging performance problems. llvm-svn: 241462 | ||||
* | R600 -> AMDGPU rename | Tom Stellard | 2015-06-13 | 1 | -0/+69 |
llvm-svn: 239657 |