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* [AMDGPU] SIFoldOperands should not fold register acrocc the EXEC definitionAlexander Timofeev2019-09-301-167/+162
| | | | | | | | Reviewers: rampitec Differential Revision: https://reviews.llvm.org/D67662 llvm-svn: 373221
* [DAG] Add SimplifyDemandedBits support for BITREVERSESimon Pilgrim2019-05-111-2/+1
| | | | | | Pulled out of D58017 while I continue to investigate the BSWAP regression on PPC llvm-svn: 360534
* AMDGPU: Don't use the default cpu in a few testsMatt Arsenault2019-04-031-268/+266
| | | | | | Avoids unnecessary test changes in a future commit. llvm-svn: 357539
* [AMDGPU] Regenerate bswap/bitreverse tests.Simon Pilgrim2019-02-261-31/+940
| | | | | | Make codegen changes more obvious in D58017 llvm-svn: 354863
* DAG: Fix not truncating when promoting bswap/bitreverseMatt Arsenault2018-01-311-1/+12
| | | | | | | These need to convert back to the original type, like any other promotion. llvm-svn: 323932
* [AMDGPU] Switch scalarize global loads ON by defaultAlexander Timofeev2017-07-041-5/+15
| | | | | | Differential revision: https://reviews.llvm.org/D34407 llvm-svn: 307097
* Revert r307026, "[AMDGPU] Switch scalarize global loads ON by default"NAKAMURA Takumi2017-07-041-15/+5
| | | | | | | | | It broke a testcase. Failing Tests (1): LLVM :: CodeGen/AMDGPU/alignbit-pat.ll llvm-svn: 307054
* [AMDGPU] Switch scalarize global loads ON by defaultAlexander Timofeev2017-07-031-5/+15
| | | | | | Differential revision: https://reviews.llvm.org/D34407 llvm-svn: 307026
* AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernelMatt Arsenault2017-03-211-10/+10
| | | | | | | | | | | | Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
* Enable FeatureFlatForGlobal on Volcanic IslandsMatt Arsenault2017-01-241-2/+2
| | | | | | | | | | | This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> llvm-svn: 292982
* AMDGPU: Add VI i16 supportTom Stellard2016-11-101-1/+2
| | | | | | | | Patch By: Wei Ding Differential Revision: https://reviews.llvm.org/D18049 llvm-svn: 286464
* Revert "AMDGPU: Add VI i16 support"Tom Stellard2016-11-041-2/+1
| | | | | | This reverts commit r285939 and r285948. These broke some conformance tests. llvm-svn: 285995
* AMDGPU: Add VI i16 supportTom Stellard2016-11-031-1/+2
| | | | | | | | Patch By: Wei Ding Differential Revision: https://reviews.llvm.org/D18049 llvm-svn: 285939
* AMDGPU: Improve splitting 64-bit bit ops by constantsMatt Arsenault2016-09-141-1/+2
| | | | | | | | This addresses a TODO to handle operations besides and. This also starts eliminating no-op operations with a constant that can emerge later. llvm-svn: 281488
* AMDGPU: Remove brev intrinsicMatt Arsenault2016-07-151-10/+0
| | | | llvm-svn: 275620
* AMDGPU: Use generic bitreverse intrinsicMatt Arsenault2015-12-141-0/+115
Also fix bug in vector legalization for bitreverse. llvm-svn: 255512
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