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* [AArch64] Prefer "mov" over "orr" to materialize constants.Eli Friedman2019-03-251-23/+23
| | | | | | | | | | | | | This is generally more readable due to the way the assembler aliases work. (This causes a lot of test changes, but it's not really as scary as it looks at first glance; it's just mechanically changing a bunch of checks for orr to check for mov instead.) Differential Revision: https://reviews.llvm.org/D59720 llvm-svn: 356954
* NFC][CodeGen][X86][AArch64] Tests for bit extract (pat. a/c/d) with trunc ↵Roman Lebedev2018-12-221-0/+153
| | | | | | (PR36419) llvm-svn: 350000
* [NFC][CodeGen][X86][AArch64] Bit extract: add nounwind attr to drop .cfi noiseRoman Lebedev2018-12-221-18/+18
| | | | | | Forgot about that. llvm-svn: 349999
* [NFC][CodeGen][X86][AArch64] Tests for bit extract (pat. b) with trunc (PR36419)Roman Lebedev2018-12-221-0/+61
| | | | | | | | | | | | | | | | @bextr64_32_b1 is extracted from hotpath of real-world code (RawSpeed BitStream<>::peekBitsNoFill()) after `clang -O3`. @bextr64_32_b2/@bextr64_32_b0 is the same pattern, but with trunc done last, showing how i think it can be handled: https://rise4fun.com/Alive/K4B https://rise4fun.com/Alive/qC9 It is possible that middle-end should do some of this, too. https://bugs.llvm.org/show_bug.cgi?id=36419 llvm-svn: 349998
* [NFC][x86][AArch64] extract-bits.ll: add test with 'ashr'.Roman Lebedev2018-11-051-0/+32
| | | | llvm-svn: 346121
* [NFC][X86][AArch64] extract-bits.ll: add tests with constants+storing results.Roman Lebedev2018-10-101-0/+90
| | | | | | | As noted in https://reviews.llvm.org/D53080#inline-467678, this *may* get pessimized by that diff. llvm-svn: 344182
* [NFC][CodeGen][X86][AArch64] Add 64-bit constant bit field extract pattern testsRoman Lebedev2018-09-301-0/+50
| | | | llvm-svn: 343404
* [NFC][CodeGen][X86][AArch64] More tests for 'bit field extract' w/ constantsRoman Lebedev2018-09-241-0/+73
| | | | | | | | | | It would be best to introduce ISD::BitFieldExtract, because clearly more than one backend faces the same problem. But for now let's solve this in the x86-specific DAG combine. https://bugs.llvm.org/show_bug.cgi?id=38938 llvm-svn: 342880
* [NFC][x86][AArch64] Add BEXTR-like test patterns.Roman Lebedev2018-09-201-0/+717
Summary: Also, adjust the check prefixes so that we actually get to check the BMI1-only-case. Reviewers: craig.topper, RKSimon, spatel, javed.absar Reviewed By: RKSimon Subscribers: kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D48490 llvm-svn: 342623
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