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path: root/llvm/test/CodeGen/AArch64/arm64-misched-memdep-bug.ll
Commit message (Expand)AuthorAgeFilesLines
* [CodeGen] Use MIR syntax for MachineMemOperand printingFrancis Visoiu Mistrih2018-03-141-3/+3
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-3/+3
* [CodeGen] Print RegClasses on MI in verbose modeFrancis Visoiu Mistrih2018-01-181-3/+3
* [CodeGen] Don't print register classes in -debug outputFrancis Visoiu Mistrih2018-01-091-4/+4
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-2/+2
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-1/+1
* [CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih2017-11-301-5/+5
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-3/+3
* [CodeGen] Add dependency printerEvandro Menezes2017-07-121-3/+3
* CodeGen: Rename DEBUG_TYPE to match passnamesMatthias Braun2017-05-251-1/+1
* ScheduleDAG: Match enum names when printing sdep kindsMatthias Braun2016-09-231-3/+3
* [ScheduleDAGInstrs::buildSchedGraph()] Handling of memory dependecies rewritten.Jonas Paulsson2016-02-031-0/+3
* ScheduleDAGInstrs: Bug fix for missed memory dependency.Geoff Berry2016-01-061-0/+22
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