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* [CostModel][X86] Add vXi8 vector division by constants costs.Simon Pilgrim2018-10-243-193/+193
| | | | | | ISD::MULHS/ISD::MULHU lowering of vXi8 types means we expand these in TargetLowering BuildSDIV/BuildUDIV. llvm-svn: 345175
* [CostModel][X86] Enable non-uniform vector division by constants costs.Simon Pilgrim2018-10-243-102/+598
| | | | | | Non-uniform division/remainder handling was added back at D49248/D50765 - so share the 'mul+sub' costs that already exist for uniform cases. llvm-svn: 345164
* [TTI][X86] Treat SK_Transpose shuffles as SK_PermuteTwoSrc - there's no ↵Simon Pilgrim2018-10-231-61/+185
| | | | | | difference in lowering. llvm-svn: 345048
* [CostModel][X86] Add transpose shuffle cost testsSimon Pilgrim2018-10-231-0/+164
| | | | llvm-svn: 345045
* [CostModel][X86] Add some initial extract/insert subvector shuffle cost testsSimon Pilgrim2018-10-202-0/+252
| | | | | | Just f64/i64 tests initially to demonstrate PR39368 llvm-svn: 344857
* [CostModel][X86] Add integer vector reduction cost testsSimon Pilgrim2018-10-209-0/+2561
| | | | llvm-svn: 344846
* [X86] Correct the cost of (v4i32 (fptoui (v4f64))) under AVX512F.Craig Topper2018-08-261-2/+2
| | | | | | | | | | | | | | Summary: This was inheriting the cost from the AVX table, but should be legal under AVX512. Reviewers: RKSimon Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D51267 llvm-svn: 340708
* [TargetTransformInfo] Add pow2 analysis for scalar constantsSimon Pilgrim2018-07-112-144/+144
| | | | | | Add ConstantInt analysis to getOperandInfo so we get more realistic div/rem expansion costs comparable to the vector costs. llvm-svn: 336827
* [CostModel][X86] Add SREM/UREM general and constant costs (PR38056)Simon Pilgrim2018-07-071-216/+748
| | | | | | | | | | We penalize general SDIV/UDIV costs but don't do the same for SREM/UREM. This patch makes general vector SREM/UREM x20 as costly as scalar, the same approach as we do for SDIV/UDIV. The patch also extends the existing SDIV/UDIV constant costs for SREM/UREM - at the moment this means the additional cost of a MUL+SUB (see D48975). Differential Revision: https://reviews.llvm.org/D48980 llvm-svn: 336486
* [CostModel][X86] Add UDIV/UREM by pow2 costsSimon Pilgrim2018-07-052-174/+421
| | | | | | Normally InstCombine would have simplified these to SRL/AND instructions but we may still see these during SLP vectorization etc. llvm-svn: 336371
* [CostModel][X86] Add cost tests for fp rounding intrinsicsSimon Pilgrim2018-07-021-0/+519
| | | | | | Add cost tests for fp ceil, floor, nearbyint, rint and trunc. llvm-svn: 336122
* [X86][AVX] Reduce v4f64/v4i64 shuffle costs (PR37882)Simon Pilgrim2018-06-213-61/+47
| | | | | | These were being over cautious for costs for one/two op general shuffles - VSHUFPD doesn't have to replicate the same shuffle in both lanes like VSHUFPS does. llvm-svn: 335216
* [CostModel] Recognise REVERSE shuffle mask if the elements come from the ↵Simon Pilgrim2018-06-141-7/+7
| | | | | | second src llvm-svn: 334698
* [CostModel][X86] Test showing failure to recognise REVERSE shuffle mask if ↵Simon Pilgrim2018-06-131-0/+47
| | | | | | the elements come from the second src llvm-svn: 334623
* [CostModel] Recognise BROADCAST shuffle mask if the elements come from the ↵Simon Pilgrim2018-06-131-7/+7
| | | | | | second src llvm-svn: 334620
* [CostModel][X86] Test showing failure to recognise BROADCAST shuffle mask if ↵Simon Pilgrim2018-06-131-0/+47
| | | | | | the elements come from the second src llvm-svn: 334616
* [CostModel] Replace ShuffleKind::SK_Alternate with ShuffleKind::SK_Select ↵Simon Pilgrim2018-06-121-128/+96
| | | | | | | | | | | | | | | | | | (PR33744) As discussed on PR33744, this patch relaxes ShuffleKind::SK_Alternate which requires shuffle masks to only match an alternating pattern from its 2 sources: e.g. v4f32: <0,5,2,7> or <4,1,6,3> This seems far too restrictive as most SIMD hardware which will implement it using a general blend/bit-select instruction, so replaces it with SK_Select, permitting elements from either source as long as they are inline: e.g. v4f32: <0,5,2,7>, <4,1,6,3>, <0,1,6,7>, <4,1,2,3> etc. This initial patch just updates the name and cost model shuffle mask analysis, later patch reviews will update SLP to better utilise this - it still limits itself to SK_Alternate style patterns. Differential Revision: https://reviews.llvm.org/D47985 llvm-svn: 334513
* [CostModel] Treat Identity shuffle masks as zero costSimon Pilgrim2018-06-122-92/+56
| | | | | | | | | | As discussed on D47985, identity shuffle masks should probably be free. I've limited this to the case where the input and output types all match - but we could probably accept all cases. Differential Revision: https://reviews.llvm.org/D47986 llvm-svn: 334506
* [CostModel][X86] Add extra Identity shuffle mask cost tests (D47986)Simon Pilgrim2018-06-121-0/+59
| | | | llvm-svn: 334486
* [CostModel][X86] Add 'select' style shuffle costs tests (PR33744)Simon Pilgrim2018-06-091-2/+324
| | | | llvm-svn: 334351
* [X86][SSE] Use multiplication scale factors for v8i16 SHL on pre-AVX2 targets.Simon Pilgrim2018-06-051-4/+4
| | | | | | | | | | | | Similar to v4i32 SHL, convert v8i16 shift amounts to scale factors instead to improve performance and reduce instruction count. We were already doing this for constant shifts, this adds variable shift support. Reduces the serial nature of the codegen, which relies on chains of plendvb/pand+pandn+por shifts. This is a step towards adding support for vXi16 vector rotates. Differential Revision: https://reviews.llvm.org/D47546 llvm-svn: 334023
* [TTI] Add uniform/non-uniform constant Pow2 detection to ↵Simon Pilgrim2018-05-221-158/+253
| | | | | | | | | | | | | | | | TargetTransformInfo::getInstructionThroughput This enables us to detect more fast path sdiv cases under cost analysis. This patch also enables us to handle non-uniform-constant pow2 cases for X86 SDIV costs. Found while working on D46276 Future patches can then extend the vectorizers to more fully support non-uniform pow2 cases. Differential Revision: https://reviews.llvm.org/D46637 llvm-svn: 332969
* [CostModel][X86] Split off SLM checksSimon Pilgrim2018-05-091-1/+77
| | | | | | A future patch will require this and the diff is much better if we perform the split separately. llvm-svn: 331867
* [CostModel][X86] Add div/rem tests for non-uniform constant divisorsSimon Pilgrim2018-04-252-0/+496
| | | | llvm-svn: 330852
* [CostModel][X86] Add vector element insert/extract cost testsSimon Pilgrim2018-04-202-0/+718
| | | | llvm-svn: 330439
* [CostModel][X86] Add srem/urem constant cost testsSimon Pilgrim2018-04-201-0/+248
| | | | llvm-svn: 330436
* [CostModel][X86] Add SLM/GLM/BtVer2 compare + division/remainder cost testsSimon Pilgrim2018-04-203-0/+194
| | | | llvm-svn: 330435
* [CostModel][X86] Split off BtVer2 cost checksSimon Pilgrim2018-04-2015-101/+1454
| | | | llvm-svn: 330433
* [CostModel][X86] Add GoldmontPlus cost testsSimon Pilgrim2018-04-201-0/+1
| | | | | | Just reuses goldmont costs atm llvm-svn: 330432
* [CostModel][X86] Add some specific cpu targets to the cost modelsSimon Pilgrim2018-04-1315-313/+371
| | | | | | We're mostly testing with generic isa attributes, but PR36550 will require testing of specific target's scheduler models as well. llvm-svn: 330056
* [CostModel][X86] Split fma arith costs tests from other fp testsSimon Pilgrim2018-04-132-10/+73
| | | | | | Was proving cumbersome to test with/without fma llvm-svn: 330054
* [CostModel][X86] Regenerate latency/codesize cost testsSimon Pilgrim2018-04-131-33/+27
| | | | llvm-svn: 330052
* [CostModel][X86] Regenerate cast conversion cost testsSimon Pilgrim2018-04-131-146/+378
| | | | llvm-svn: 330051
* [CostModel][X86] Regenerate masked intrinsic cost testsSimon Pilgrim2018-04-131-160/+429
| | | | llvm-svn: 330050
* [CostModel][X86] Regenerate vector reduction cost tests with ↵Simon Pilgrim2018-04-071-104/+987
| | | | | | | update_analyze_test_checks.py NOTE: We're only really interested in the extractelement cost (which represents the entire reduction). llvm-svn: 329504
* [CostModel][X86] Regenerate vector select cost tests with ↵Simon Pilgrim2018-04-071-59/+73
| | | | | | update_analyze_test_checks.py llvm-svn: 329502
* [CostModel][X86] Regenerate vector integer truncation cost tests with ↵Simon Pilgrim2018-04-071-118/+191
| | | | | | update_analyze_test_checks.py llvm-svn: 329500
* [CostModel][X86] Regenerate silvermont (and added goldmont) cost tests with ↵Simon Pilgrim2018-04-071-46/+357
| | | | | | update_analyze_test_checks.py llvm-svn: 329499
* [CostModel][X86] Fix v32i16/v64i8 SETCC costs on AVX512BW targetsSimon Pilgrim2018-04-071-4/+4
| | | | llvm-svn: 329498
* [CostModel][X86] Regenerate vector comparison cost tests with ↵Simon Pilgrim2018-04-071-137/+286
| | | | | | update_analyze_test_checks.py llvm-svn: 329497
* [CostModel][X86] Regenerate bit count cost tests with ↵Simon Pilgrim2018-04-063-447/+1415
| | | | | | update_analyze_test_checks.py llvm-svn: 329413
* [CostModel][X86] Regenerate vector shuffle cost tests with ↵Simon Pilgrim2018-04-065-856/+1288
| | | | | | update_analyze_test_checks.py llvm-svn: 329410
* [CostModel][X86] Regenerate bswap/bitreverse cost tests with ↵Simon Pilgrim2018-04-062-160/+442
| | | | | | update_analyze_test_checks.py llvm-svn: 329407
* [CostModel][X86] Regenerate integer extension/truncation cost tests with ↵Simon Pilgrim2018-04-061-167/+336
| | | | | | update_analyze_test_checks.py llvm-svn: 329402
* [CostModel][X86] Regenerate integer division/remainder tests with ↵Simon Pilgrim2018-04-063-367/+673
| | | | | | update_analyze_test_checks.py llvm-svn: 329401
* [CostModel][X86] Regenerate vector shift cost tests with ↵Simon Pilgrim2018-04-063-1229/+4331
| | | | | | update_analyze_test_checks.py llvm-svn: 329400
* [CostModel][X86] Regenerate int<->fp cost tests with ↵Simon Pilgrim2018-04-064-763/+798
| | | | | | update_analyze_test_checks.py llvm-svn: 329398
* [UpdateTestChecks] Add update_analyze_test_checks.py for cost model analysis ↵Simon Pilgrim2018-04-062-1097/+1529
| | | | | | | | | | | | | | generation The script allows the auto-generation of checks for cost model tests to speed up their creation and help improve coverage, which will help a lot with PR36550. If the need arises we can add support for other analyze passes as well, but the cost models was the one I needed to get done - at the moment it just warns that any other analysis mode is unsupported. I've regenerated a couple of x86 test files to show the effect. Differential Revision: https://reviews.llvm.org/D45272 llvm-svn: 329390
* [X86][CostModel] Use generic SSE levels instead of particular CPUs for ↵Simon Pilgrim2018-04-041-5/+5
| | | | | | shuffle costs llvm-svn: 329168
* [X86] Update cost model for Goldmont. Add fsqrt costs for SilvermontCraig Topper2018-03-252-8/+229
| | | | | | | | | | | | | | Add fdiv costs for Goldmont using table 16-17 of the Intel Optimization Manual. Also add overrides for FSQRT for Goldmont and Silvermont. Reviewers: RKSimon Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D44644 llvm-svn: 328451
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