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VOP3P instructions can encode access to either
half of the register.
llvm-svn: 302730
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Currently the default C calling convention functions are treated
the same as compute kernels. Make this explicit so the default
calling convention can be changed to a non-kernel.
Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'
on the relevant test directories (and undoing in one place that actually
wanted a non-kernel).
llvm-svn: 298444
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This resolves bug 21148 by preventing promotion to
i64 induction variables.
llvm-svn: 264376
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llvm-svn: 264374
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llvm-svn: 264369
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Ideally this would also happen for fneg, but that
isn't a distinct operation in the IR.
llvm-svn: 264368
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We don't want to have a cost to scalarizing operations.
llvm-svn: 264364
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The default cost was 0 with the assumption that it is predictable.
llvm-svn: 255796
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The cost for scalarized operations is computed as N * (scalar operation
cost + 1 extractelement + 1 insertelement). This partially fixes
inflating the cost of scalarized operations since every operation is
scalarized and free. I don't think we want any cost asociated with
scalarization, but for now insertelement is still counted. I'm not sure
if we should pretend that insertelement is also free, or add a way
to compute a custom scalarization cost.
llvm-svn: 254438
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