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* AMDGPU/SI: Add offset field to ds_permute/ds_bpermute instructionsTom Stellard2016-04-293-12/+8
| | | | | | | | | | | | | | Summary: These instructions can add an immediate offset to the address, like other ds instructions. Reviewers: arsenm Subscribers: arsenm, scchan Differential Revision: http://reviews.llvm.org/D19233 llvm-svn: 268043
* [mips][ias] Split expandMemInst between MipsAsmParser and ↵Daniel Sanders2016-04-293-66/+205
| | | | | | | | | | | | | | | | | | | | | | MipsTargetStreamer. Almost NFC. Summary: The portion in MipsAsmParser is responsible for figuring out which expansion to use, while the portion in MipsTargetStreamer is responsible for emitting it. This allows us to remove the call to isIntegratedAssemblerRequired() which is currently ensuring the effect of .cprestore only occurs when writing objects. The small functional change is that the memory offsets are now correctly printed as signed values. Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D19714 llvm-svn: 268042
* [mips][ias] Moved most instruction emission helpers to MipsTargetStreamer. NFC.Daniel Sanders2016-04-293-279/+325
| | | | | | | | | | | | | | | | | | | Summary: * Moved all the emit*() helpers to MipsTargetStreamer. * Moved createNop() to MipsTargetStreamer as emitNop() and emitEmptyDelaySlot(). This instruction has been split to distinguish between the 'nop' instruction and the nop used in delay slots which is sometimes a different nop to the 'nop' instruction (e.g. for short delay slots on microMIPS). * Moved createAddu() to MipsTargetStreamer as emitAddu(). * Moved createAppropriateDSLL() to MipsTargetStreamer as emitDSLL(). Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D19712 llvm-svn: 268041
* [mips][ias] Make section sizes a multiple of the alignment.Daniel Sanders2016-04-291-0/+15
| | | | | | | | | | Reviewers: sdardis Subscribers: dsanders, llvm-commits, sdardis Differential Revision: http://reviews.llvm.org/D19008 llvm-svn: 268036
* AMDGPU/SI: Assembler: Unify parsing/printing of operands.Nikolay Haustov2016-04-294-622/+365
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The goal is for each operand type to have its own parse function and at the same time share common code for tracking state as different instruction types share operand types (e.g. glc/glc_flat, etc). Introduce parseAMDGPUOperand which can parse any optional operand. DPP and Clamp/OMod have custom handling for now. Sam also suggested to have class hierarchy for operand types instead of table. This can be done in separate change. Remove parseVOP3OptionalOps, parseDS*OptionalOps, parseFlatOptionalOps, parseMubufOptionalOps, parseDPPOptionalOps. Reduce number of definitions of AsmOperand's and MatchClasses' by using common base class. Rename AsmMatcher/InstPrinter methods accordingly. Print immediate type when printing parsed immediate operand. Use 'off' if offset/index register is unused instead of skipping it to make it more readable (also agreed with SP3). Update tests. Reviewers: tstellarAMD, SamWot, artem.tamazov Subscribers: qcolombet, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19584 llvm-svn: 268015
* [mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructionsZlatko Buljan2016-04-294-33/+20
| | | | | | Differential Revision: http://reviews.llvm.org/D18645 llvm-svn: 268012
* [GlobalOpt] Propagate operand bundlesDavid Majnemer2016-04-292-17/+56
| | | | | | | We neglected to transfer operand bundles for some transforms. These were found via inspection, I'll try to come up with some test cases. llvm-svn: 268011
* [InstCombine] Propagate operand bundlesDavid Majnemer2016-04-292-3/+9
| | | | | | | We neglected to transfer operand bundles for some transforms. These were found via inspection, I'll try to come up with some test cases. llvm-svn: 268010
* [DeadArgumentElimination] Propagate operand bundles to promoted call sitesDavid Majnemer2016-04-291-4/+10
| | | | | | | We neglected to transfer operand bundles when performing argument promotion. llvm-svn: 268008
* [LoopDist] Also emit optimization remark on success (-Rpass=)Adam Nemet2016-04-291-0/+3
| | | | | | | The option -Rpass=loop-distribute now reports the loops that were distributed. llvm-svn: 268006
* [LoopDist] Pass 'Function' to main class. NFCAdam Nemet2016-04-291-6/+8
| | | | | | Next patch will add another use for 'Function' inside the class. llvm-svn: 268005
* [SLPVectorizer] Add operand bundles to vectorized functionsDavid Majnemer2016-04-291-2/+16
| | | | | | | SLPVectorizing a call site should result in further propagation of its bundles. llvm-svn: 268004
* [LoopVectorize] Add operand bundles to vectorized functionsDavid Majnemer2016-04-291-5/+7
| | | | | | | Also, do not crash when calculating a cost model for loop-invariant token values. llvm-svn: 268003
* AMDGPU: Stop reporting an addressing mode for unknown addrspaceMatt Arsenault2016-04-291-1/+6
| | | | | | | | | This was being treated the same as private, which has an immediate offset. For unknown, it probably means it's for a computation not actually being used for accessing memory, so it should not have a nontrivial addressing mode. llvm-svn: 268002
* DivergenceAnalysis: Fix crash with unreachable blocksMatt Arsenault2016-04-291-0/+5
| | | | | | | Unreachable blocks may not be in the dominator tree, so don't crash on them. llvm-svn: 268001
* [ArgumentPromotion] Propagate operand bundles to promoted call sitesDavid Majnemer2016-04-291-2/+5
| | | | | | | | | We neglected to transfer operand bundles when performing argument promotion. This fixes PR27568. llvm-svn: 267986
* [X86] Remove unnecessary header file containing a small class. It was only ↵Craig Topper2016-04-292-115/+84
| | | | | | included in one place. Just define the class directly in the cpp file. NFC llvm-svn: 267985
* [X86] Include X86MCTargetDesc.h directly in X86Disassembler.cpp instead of ↵Craig Topper2016-04-291-9/+1
| | | | | | duplicating parts of it. NFC llvm-svn: 267984
* [PR25281] Remove AAResultsWrapper from preserved analyses of loop vectorizer.Michael Zolotukhin2016-04-291-1/+0
| | | | | | | We don't preserve AAResults, because, for one, we don't preserve SCEV-AA. That fixes PR25281. llvm-svn: 267980
* RegisterPressure: Fix default lanemask for missing regunit intervalsMatthias Braun2016-04-291-35/+33
| | | | | | | | | | | | | | In case of missing live intervals for a physical registers getLanesWithProperty() would report 0 which was not a safe default in all situations. Add a parameter to pass in a safe default. No testcase because in-tree targets do not skip computing register unit live intervals. Also cleanup the getXXX() functions to not perform the RequireLiveIntervals checks anymore so we do not even need to return safe defaults. llvm-svn: 267977
* RegisterPressure: Cannot produce dead (subregister) defs anymoreMatthias Braun2016-04-291-3/+2
| | | | | | | | | With the DetectDeadLanes pass in place we cannot run into situations anymore where defs suddenly become dead. Also add a missing check so we do not try to add an undef flag to a physreg (found by visual inspection, no failing test). llvm-svn: 267976
* Fix build by casting to the proper int type.Ivan Krasin2016-04-291-1/+1
| | | | | | | | Reviewers: eugenis Differential Revision: http://reviews.llvm.org/D19706 llvm-svn: 267974
* [LoopVectorize] Keep hints from original loop on the vector loopHal Finkel2016-04-291-0/+5
| | | | | | | | | | | | | | | | We need to keep loop hints from the original loop on the new vector loop. Failure to do this meant that, for example: void foo(int *b) { #pragma clang loop unroll(disable) for (int i = 0; i < 16; ++i) b[i] = 1; } this loop would be unrolled. Why? Because we'd vectorize it, thus dropping the hints that unrolling should be disabled, and then we'd unroll it. llvm-svn: 267970
* [msan] Handle vector compare x86 intrinsics.Evgeniy Stepanov2016-04-291-0/+69
| | | | | | This handles SSE and SSE2 cmp_* and comiXX_* intrinsics. llvm-svn: 267966
* [llvm-pdbdump] Try to appease the ASan botDavid Majnemer2016-04-291-0/+5
| | | | | | We didn't check that the file was large enough to hold a super block. llvm-svn: 267965
* [X86] Use nested switches to vary the operand to helper functions that were ↵Craig Topper2016-04-291-43/+74
| | | | | | previously called in multiple cases. This seems to help the inliner reduce code. NFC llvm-svn: 267964
* [llvm-pdbdump] Restore error messages, handle bad block sizesDavid Majnemer2016-04-281-1/+1
| | | | | | | We lost the ability to report errors, bring it back. Also, correctly validate the block size. llvm-svn: 267955
* LiveIntervalAnalysis: Remove LiveVariables requirementMatthias Braun2016-04-284-8/+11
| | | | | | | | | | | | This requirement was a huge hack to keep LiveVariables alive because it was optionally used by TwoAddressInstructionPass and PHIElimination. However we have AnalysisUsage::addUsedIfAvailable() which we can use in those passes. This re-applies r260806 with LiveVariables manually added to PowerPC to hopefully not break the stage 2 bots this time. llvm-svn: 267954
* [llvm-pdbdump] Correctly read data larger than a blockDavid Majnemer2016-04-281-25/+15
| | | | | | | | | A bug was introduced when the code was refactored which resulted in a bad memory access. This fixes PR27565. llvm-svn: 267953
* [LoopDist] Emit optimization remarks (-Rpass*)Adam Nemet2016-04-281-0/+25
| | | | | | | | | | | | | | | | I closely followed the precedents set by the vectorizer: * With -Rpass-missed, the loop is reported with further details pointing to -Rpass--analysis. * -Rpass-analysis reports the details why distribution has failed. * Regardless of -Rpass*, when distribution fails for a loop where distribution was forced with the pragma, a warning is produced according to -Wpass-failed. In this case the analysis info is also printed even without -Rpass-analysis. llvm-svn: 267952
* [LoopDist] Improve debug messagesAdam Nemet2016-04-281-6/+6
| | | | | | | | | | | The next patch will start using these for -Rpass-analysis so they won't be internal-only anymore. Move the 'Skipping; ' prefix that some of the message are using into the 'fail' function. We don't want to include this prefix in the -Rpass-analysis report. llvm-svn: 267951
* [LoopDist] Add helper to print debug message when distribution fails. NFCAdam Nemet2016-04-281-23/+20
| | | | | | This will form the basis to emit optimization remarks (-Rpass*). llvm-svn: 267950
* [Inliner] Preserve llvm.mem.parallel_loop_access metadataHal Finkel2016-04-281-0/+31
| | | | | | | | | | | | | | | | | | | | | | | When inlining a call site with llvm.mem.parallel_loop_access metadata, this metadata needs to be propagated to all cloned memory-accessing instructions. Otherwise, inlining parts of the loop body will invalidate the annotation. With this functionality, we now vectorize the following as expected: void Body(int *res, int *c, int *d, int *p, int i) { res[i] = (p[i] == 0) ? res[i] : res[i] + d[i]; } void Test(int *res, int *c, int *d, int *p, int n) { int i; #pragma clang loop vectorize(assume_safety) for (i = 0; i < 1600; i++) { Body(res, c, d, p, i); } } llvm-svn: 267949
* Read discriminators correctly from object file.Dehao Chen2016-04-282-48/+34
| | | | | | | | | | | | | | | Summary: This is the follow-up patch for http://reviews.llvm.org/D19436 * Update the discriminator reading algorithm to match the assignment algorithm. * Add test to cover the new algorithm. Reviewers: dnovillo, echristo, dblaikie Subscribers: danielcdh, dblaikie, echristo, llvm-commits, joker.eph Differential Revision: http://reviews.llvm.org/D19522 llvm-svn: 267945
* [CodeGen] Remove extra ';'Marcin Koscielnicki2016-04-281-1/+1
| | | | | | Squashes a -Wpedantic warning. llvm-svn: 267944
* [PowerPC] Fix the EH_SjLj_Setup pseudo.Marcin Koscielnicki2016-04-282-1/+6
| | | | | | | | | | | | | | | | | | | This instruction is just a control flow marker - it should not actually exist in the object file. Unfortunately, nothing catches it before it gets to AsmPrinter. If integrated assembler is used, it's considered to be a normal 4-byte instruction, and emitted as an all-0 word, crashing the program. With external assembler, a comment is emitted. Fixed by setting Size to 0 and handling it in MCCodeEmitter - this means the comment will still be emitted if integrated assembler is not used. This broke an ASan test, which has been disabled for a long time as a result (see the discussion on D19657). We can reenable it once this lands. llvm-svn: 267943
* [RDF] Recognize tail calls in graph creationKrzysztof Parzyszek2016-04-281-4/+20
| | | | llvm-svn: 267939
* Fix warning in PDB code. NFCAmaury Sechet2016-04-281-1/+1
| | | | llvm-svn: 267938
* LiveIntervalAnalysis: No need to deal with dead subregister defs anymore.Matthias Braun2016-04-281-20/+3
| | | | | | | | The DetectDeadLaneMask already ensures that we have no dead subregister definitions making the special handling in LiveIntervalAnalysis unnecessary. This reverts most of r248335. llvm-svn: 267937
* [RDF] Improve handling of inline-asmKrzysztof Parzyszek2016-04-281-4/+5
| | | | | | | - Keep implicit defs from inline-asm instructions. - Treat register references from inline-asm as fixed. llvm-svn: 267936
* Add parentheses to silence -Wparentheses warnings.Zachary Turner2016-04-281-6/+6
| | | | llvm-svn: 267934
* [RDF] Add option to keep dead phi nodes in DFGKrzysztof Parzyszek2016-04-283-4/+15
| | | | | | | | | | Dead phi nodes are needed for code motion (such as copy propagation), where a new use would be placed in a location that would be dominated by a dead phi. Such a transformation is not legal for copy propagation, and the existence of the phi would prevent it, but if the phi is not there, it may appear to be valid. llvm-svn: 267932
* Read the rest of the DBI substreams, and parse source info.Zachary Turner2016-04-281-11/+124
| | | | | | | | | | | | | We now read out the rest of the substreams from the DBI streams. One of these substreams, the FileInfo substream, contains information about which source files contribute to each module (aka compiland). This patch additionally parses out the file information from that substream, and dumps it in llvm-pdbdump. Differential Revision: http://reviews.llvm.org/D19634 Reviewed by: ruiu llvm-svn: 267928
* This reverts commit r265505.Kit Barton2016-04-287-268/+0
| | | | | | | Revert "[Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random number, set bool, and dfp test significance". This patch has caused a functional regression in SPEC2k6 namd, and a performance regression in mesa-pipe. llvm-svn: 267927
* [Hexagon] Add instruction aliases for vector unsigned compare-equalKrzysztof Parzyszek2016-04-281-0/+65
| | | | | | Unsigned compare-equal instructions are mapped to signed compare-equal. llvm-svn: 267925
* AMDGPU: Emit error if too much LDS is usedMatt Arsenault2016-04-281-0/+5
| | | | llvm-svn: 267922
* Remove doInitialization() and doFinalization() member declarations without ↵Yaron Keren2016-04-281-16/+0
| | | | | | | | definitions. Visual C++ 2015 flags this in the IDE. llvm-svn: 267919
* Reset the TopRPTracker's position in ScheduleDAGMILive::initQueuesKrzysztof Parzyszek2016-04-281-5/+11
| | | | | | | | | | | | | | | | | | | ScheduleDAGMI::initQueues changes the RegionBegin to the first non-debug instruction. Since it does not track register pressure, it does not affect any RP trackers. ScheduleDAGMILive inherits initQueues from ScheduleDAGMI, and it does reset the TopTPTracker in its schedule method. Any derived, target-specific scheduler will need to do it as well, but the TopRPTracker is only exposed as a "const" object to derived classes. Without the ability to modify the tracker directly, this leaves a derived scheduler with a potential of having the TopRPTracker out-of-sync with the CurrentTop. The symptom of the problem: void llvm::ScheduleDAGMILive::scheduleMI(llvm::SUnit *, bool): Assertion `TopRPTracker.getPos() == CurrentTop && "out of sync"' failed. Differential Revision: http://reviews.llvm.org/D19438 llvm-svn: 267918
* AMDGPU: Fix mishandling array allocations when promoting allocaMatt Arsenault2016-04-281-1/+3
| | | | | | | | The canonical form for allocas is a single allocation of the array type. In case we see a non-canonical array alloca, make sure we aren't replacing this with an array N times smaller. llvm-svn: 267916
* Add "PIE Level" metadata to module flags.Sriraman Tallam2016-04-281-0/+14
| | | | | | http://reviews.llvm.org/D19671 llvm-svn: 267911
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