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* Have the verifier check that all landingpad operands are constants.Duncan Sands2011-09-271-0/+11
| | | | llvm-svn: 140606
* Cleanup PromoteIntOp_EXTRACT_VECTOR_ELT and PromoteIntRes_SETCC.Nadav Rotem2011-09-272-10/+12
| | | | | | Add a new method: getAnyExtOrTrunc and use it to replace the manual check. llvm-svn: 140603
* Revert r140463; The patch assumes that <4 x i1> is saved to memory as 4 x i8,Nadav Rotem2011-09-271-10/+1
| | | | | | while the decision is to bit-pack small values. llvm-svn: 140601
* Mark MipsPseudo isPseudo.Akira Hatanaka2011-09-271-1/+3
| | | | llvm-svn: 140598
* PTX: Add support for sitofp in backendJustin Holewinski2011-09-271-0/+25
| | | | llvm-svn: 140593
* Split the landing pad basic block with the correct function. Also merge theBill Wendling2011-09-271-3/+23
| | | | | | | split landingpad instructions into a PHI node. PR11016 llvm-svn: 140592
* Disable LSR retry by default.Andrew Trick2011-09-271-0/+16
| | | | | | | Disabling aggressive LSR saves compilation time, and with the new indvars behavior usually improves performance. llvm-svn: 140590
* LSR, one of the new Cost::isLoser() checks did not get merged in the ↵Andrew Trick2011-09-261-2/+6
| | | | | | previous checkin. llvm-svn: 140583
* Remove extraneous commit garbage.Owen Anderson2011-09-261-2/+0
| | | | llvm-svn: 140581
* LSR cost metric minor fix and verification.Andrew Trick2011-09-261-3/+26
| | | | | | | | The minor bug heuristic was noticed by inspection. I added the isLoser/isValid helpers because they will become more important with subsequent checkins. llvm-svn: 140580
* Set register class of a register according to value of HasMips64.Akira Hatanaka2011-09-261-1/+1
| | | | llvm-svn: 140570
* Define variable HasMips64 in MipsTargetLowering.Akira Hatanaka2011-09-262-4/+5
| | | | llvm-svn: 140569
* In single float mode, double precision FP arguments are passed in integerAkira Hatanaka2011-09-261-4/+3
| | | | | | registers, so there is no need to check here. llvm-svn: 140568
* ASR #32 is not allowed on Thumb2 USAT and SSAT instructions.Owen Anderson2011-09-263-3/+37
| | | | llvm-svn: 140560
* Enhance alias analysis for atomic instructions a bit. Upgrade a couple ↵Eli Friedman2011-09-261-0/+40
| | | | | | alias-analysis tests to the new atomic instructions. llvm-svn: 140557
* PTX: Fix memcpy intrinsic to handle 64-bit pointersJustin Holewinski2011-09-261-8/+9
| | | | llvm-svn: 140556
* PTX: Implement PTXSelectionDAGInfoJustin Holewinski2011-09-265-5/+214
| | | | llvm-svn: 140549
* PTX: Implement ISD::ANY_EXTENDJustin Holewinski2011-09-261-0/+12
| | | | llvm-svn: 140548
* PTX: Fix detection of stack load/store vs. global load/store, as well as fix theJustin Holewinski2011-09-263-48/+75
| | | | | | printing of local offsets llvm-svn: 140547
* Fix emission of debug data for global variables. getContext() on ↵James Molloy2011-09-261-2/+2
| | | | | | DIGlobalVariables is not valid any more. llvm-svn: 140539
* PTX: SM > 2.0 implies +doubleJustin Holewinski2011-09-261-5/+6
| | | | llvm-svn: 140536
* PTX: Fix some lingering issues with stack allocationJustin Holewinski2011-09-261-1/+3
| | | | llvm-svn: 140535
* PTX: Split up the TableGen instruction definitions into logical unitsJustin Holewinski2011-09-263-418/+300
| | | | llvm-svn: 140534
* PTX: Unify handling of loads/storesJustin Holewinski2011-09-263-76/+38
| | | | llvm-svn: 140533
* PTX: Handle FrameIndex nodesJustin Holewinski2011-09-266-30/+204
| | | | llvm-svn: 140532
* PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL ↵David Meyer2011-09-261-1/+3
| | | | | | 2011-06-09-TailCallByVal and 2010-11-04-BigByval llvm-svn: 140516
* Fix VEX decoding in i386 mode. Fixes PR11008.Craig Topper2011-09-261-2/+2
| | | | llvm-svn: 140515
* Add target hook for pseudo instruction expansion.Jakob Stoklund Olesen2011-09-251-7/+16
| | | | | | | | | | | | Many targets use pseudo instructions to help register allocation. Like the COPY instruction, these pseudos can be expanded after register allocation. The early expansion can make life easier for PEI and the post-ra scheduler. This patch adds a hook that is called for all remaining pseudo instructions from the ExpandPostRAPseudos pass. llvm-svn: 140472
* [vector-select] Address one of the issues in pr10902. EXTRACT_VECTOR_ELEMENTNadav Rotem2011-09-251-2/+7
| | | | | | | | | SDNodes may return values which are wider than the incoming element types. In this patch we fix the integer promotion of these nodes. Fixes spill-q.ll when running -promote-elements. llvm-svn: 140471
* Clean up code after renaming LowerSubregs -> ExpandPostRAPseudos.Jakob Stoklund Olesen2011-09-253-47/+44
| | | | | | No functional change intended. llvm-svn: 140470
* Rename LowerSubregs to ExpandPostRAPseudos.Jakob Stoklund Olesen2011-09-252-1/+1
| | | | | | | | | | | | | | I'll fix the file contents in the next commit. This pass is currently expanding the COPY and SUBREG_TO_REG pseudos. I am going to add a hook so targets can expand more pseudo-instructions after register allocation. Many targets have pseudo-instructions that assist the register allocator. They can be expanded after register allocation, before PEI and PostRA scheduling. llvm-svn: 140469
* Sort CMakeLists.txt.Benjamin Kramer2011-09-241-7/+5
| | | | llvm-svn: 140465
* Implement Duncan's suggestion to use the result of getSetCCResultType if it ↵Nadav Rotem2011-09-241-4/+9
| | | | | | | | | | is legal (this is always the case for scalars), otherwise use the promoted result type. Fix test/CodeGen/X86/vsplit-and.ll when promote-elements is enabled. llvm-svn: 140464
* [Vector-Select] Address one of the problems in 10902.Nadav Rotem2011-09-241-1/+10
| | | | | | | | | | When generating the trunc-store of i1's, we need to use the vector type and not the scalar type. This patch fixes the assertion in CodeGen/Generic/bool-vector.ll when running with -promote-elements. llvm-svn: 140463
* Add .td file.Akira Hatanaka2011-09-241-0/+12
| | | | llvm-svn: 140446
* Preparation for adding simple Mips64 instructions.Akira Hatanaka2011-09-242-0/+6
| | | | llvm-svn: 140443
* Only run MF.verify() with EXPENSIVE_CHECKS=1.Jakob Stoklund Olesen2011-09-241-1/+1
| | | | llvm-svn: 140441
* sys::Process: Add a SetWorkingDirectory method.Daniel Dunbar2011-09-232-0/+9
| | | | llvm-svn: 140433
* LSR minor bug fix in RateRegister.Andrew Trick2011-09-231-1/+1
| | | | | | | No test case. Noticed by inspection and I doubt it ever affects the outcome of the overall heuristic, let alone final codegen. llvm-svn: 140431
* Verify that terminators follow non-terminators.Jakob Stoklund Olesen2011-09-231-0/+13
| | | | | | This exposes a -segmented-stacks bug. llvm-svn: 140429
* PR10998: It is not legal to sink an instruction past the terminator of a ↵Eli Friedman2011-09-231-1/+9
| | | | | | block; make sure we don't do that. llvm-svn: 140428
* Teach the Thumb2 AsmParser to accept pre-indexed loads/stores with an offset ↵Owen Anderson2011-09-231-1/+1
| | | | | | of #-0. llvm-svn: 140426
* Also match negative offsets for addrmode3 and addrmode5.Jakob Stoklund Olesen2011-09-231-2/+2
| | | | | | | | Math is hard, and isScaledConstantInRange() always returned false for negative constants. It was doing unsigned division of negative numbers before casting back to signed. llvm-svn: 140425
* Add more fixed bits to USAT16 encoding to filter out incorrect decodings.Owen Anderson2011-09-231-2/+2
| | | | llvm-svn: 140422
* Post-index loads/stores in still need to print the post-indexed immediate, ↵Owen Anderson2011-09-232-11/+11
| | | | | | even if it's zero, to distinguish them from non-post-indexed instructions. llvm-svn: 140420
* Reapply r140412 (Thumb2 reg-reg loads cannot target SP or PC), with invalid ↵Owen Anderson2011-09-231-1/+1
| | | | | | testcases updated. llvm-svn: 140415
* Revert r140412. This affects more instructions than intended.Owen Anderson2011-09-231-1/+1
| | | | llvm-svn: 140413
* Thumb2 register-shifted-register loads cannot target the PC or the SP.Owen Anderson2011-09-231-1/+1
| | | | llvm-svn: 140412
* Implement N32/64 calling convention. Patch by Liu.Akira Hatanaka2011-09-231-1/+54
| | | | llvm-svn: 140401
* Make FGR64RegisterClass available if target is Mips64.Akira Hatanaka2011-09-231-1/+6
| | | | llvm-svn: 140397
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