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* Swap VT and DebugLoc operands of getExtLoad() for consistency withStuart Hastings2011-02-1612-62/+61
| | | | | | other getNode() methods. Radar 9002173. llvm-svn: 125665
* Remove outdated README entry.Eli Friedman2011-02-161-12/+0
| | | | llvm-svn: 125660
* Remove outdated README entry.Eli Friedman2011-02-161-16/+0
| | | | llvm-svn: 125659
* Update README entry.Eli Friedman2011-02-161-13/+6
| | | | llvm-svn: 125658
* Refactor zero folding slightly. Clean up todo.Eric Christopher2011-02-161-22/+20
| | | | llvm-svn: 125651
* Gas is very inconsistent about when a relaxation/relocation is needed. DoRafael Espindola2011-02-164-47/+16
| | | | | | the right thing and stop trying to copy it. Fixes PR8944. llvm-svn: 125648
* The change for PR9190 wasn't quite right. We need to avoid making theEric Christopher2011-02-161-2/+12
| | | | | | | | | transformation if we can't legally create a build vector of the correct type. Check that we can make the transformation first, and add a TODO to refactor this code with similar cases. Fixes: PR9223 and rdar://9000350 llvm-svn: 125631
* Add support for pushsection and popsection. Patch by Joerg Sonnenberger.Rafael Espindola2011-02-1610-54/+60
| | | | llvm-svn: 125629
* Remove a duplicated check.Evan Cheng2011-02-161-1/+1
| | | | llvm-svn: 125625
* Some single precision VFP instructions may be executed on NEON pipeline, but ↵Evan Cheng2011-02-162-28/+160
| | | | | | not double precision ones. llvm-svn: 125624
* Add support for parsing [expr].Roman Divacky2011-02-151-0/+18
| | | | | | This is submitted by Joerg Sonnenberger and fixes his PR8685. llvm-svn: 125595
* Teach ARMLoadStoreOptimizer to remove kill flags from merged instructions as ↵Jakob Stoklund Olesen2011-02-151-21/+15
| | | | | | | | | | | | | | | | | | | | | | | | | well. This is necessary to avoid a crash in certain tangled situations where a kill flag is first correctly moved to a merged instruction, and then needs to be moved again: STR %R0, a... STR %R0<kill>, b... First becomes: STR %R0, b... STM a, %R0<kill>, ... and then: STM a, %R0, ... STM b, %R0<kill>, ... We can now remove the kill flag from the merged STM when needed. 8960050. llvm-svn: 125591
* Ignore DBG_VALUE machine instructions while constructing instruction ranges ↵Devang Patel2011-02-151-0/+4
| | | | | | | | based on location info. Machine instruction range consisting of only DBG_VALUE MIs only contributes consecutive labels in assembly output, which is harmless, and empty scope entry in DebugInfo, which confuses debugger tools. llvm-svn: 125577
* Implement a function from PathV2 whose definition is missing.Argyrios Kyrtzidis2011-02-151-0/+6
| | | | llvm-svn: 125574
* Move DbgInfoPrinter specific utlities inside DbgInfoPrinter.cppDevang Patel2011-02-152-111/+112
| | | | llvm-svn: 125571
* Print function info. Patch by Minjang Kim.Devang Patel2011-02-152-2/+34
| | | | llvm-svn: 125567
* Spelling fix: consequtive -> consecutive.Duncan Sands2011-02-155-5/+5
| | | | llvm-svn: 125563
* Fix 9216 - Endless loop in InstCombine pass.Nadav Rotem2011-02-151-1/+5
| | | | | | | The pattern "A&(A^B) -> A & ~B" recreated itself because ~B is actually a xor -1. llvm-svn: 125557
* Fix thinko. Cmp can be the first instruction in a MBB.Evan Cheng2011-02-151-2/+5
| | | | llvm-svn: 125552
* Do not forget DebugLoc!Devang Patel2011-02-151-0/+1
| | | | llvm-svn: 125547
* tidy up a bit.Chris Lattner2011-02-151-7/+9
| | | | llvm-svn: 125546
* convert ConstantVector::get to use ArrayRef.Chris Lattner2011-02-1511-173/+94
| | | | llvm-svn: 125537
* Remove unused bitvectors that record ARM callee-saved registers.Bob Wilson2011-02-142-23/+0
| | | | llvm-svn: 125534
* Move more fragments of spill weight calculation into CalcSpillWeights.hJakob Stoklund Olesen2011-02-142-5/+5
| | | | | | | | | | Simplify the spill weight calculation a bit by bypassing getApproximateInstructionCount() and using LiveInterval::getSize() directly. This changes the computed spill weights, but only by a constant factor in each function. It should not affect how spill weights compare against each other, and so it shouldn't affect code generation. llvm-svn: 125530
* Do not hoist @llvm.dbg.value. Here, @llvm.dbg.value is "referring" a value ↵Devang Patel2011-02-141-1/+2
| | | | | | that is modified inside loop. llvm-svn: 125529
* Switch llvm to using comdats. For now always use groups with a singleRafael Espindola2011-02-142-23/+13
| | | | | | section. llvm-svn: 125526
* Fix PR8854. Track inserted copies to avoid read before write. Sorry, it's ↵Evan Cheng2011-02-141-4/+16
| | | | | | hard to reduce a sensible small test case. llvm-svn: 125523
* A fail to match coprocessor number and register number must fail instead of ↵Bruno Cardoso Lopes2011-02-141-1/+0
| | | | | | assert. llvm-svn: 125521
* revert my ConstantVector patch, it seems to have made the llvm-gccChris Lattner2011-02-1411-94/+173
| | | | | | builders unhappy. llvm-svn: 125504
* Move broken HasCommonSymbols to ELFWriter.cpp.Rafael Espindola2011-02-142-12/+13
| | | | llvm-svn: 125490
* Fix encoding and add parsing support for the arm/thumb CPS instruction:Bruno Cardoso Lopes2011-02-1410-109/+276
| | | | | | | | | | | | - Add custom operand matching for imod and iflags. - Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC from mnemonic. - While adding ".w" as an operand, don't change "Head" to avoid passing the wrong mnemonic to ParseOperand. - Add asm parser tests. - Add disassembler tests just to make sure it can catch all cps versions. llvm-svn: 125489
* Switch ConstantVector::get to use ArrayRef instead of a pointer+sizeChris Lattner2011-02-1411-173/+94
| | | | | | idiom. Change various clients to simplify their code. llvm-svn: 125487
* fix PR9210 by implementing some type legalization logic for Chris Lattner2011-02-142-14/+47
| | | | | | vector fp conversions. llvm-svn: 125482
* fix two comment thinkosChris Lattner2011-02-141-1/+1
| | | | llvm-svn: 125481
* Add some statistics to StrongPHIElimination.Cameron Zwarich2011-02-141-0/+8
| | | | llvm-svn: 125477
* Add a statistic to PHIElimination tracking the number of critical edges split.Cameron Zwarich2011-02-141-2/+7
| | | | llvm-svn: 125476
* Enhance ComputeMaskedBits to know that aligned frameindexesChris Lattner2011-02-135-72/+91
| | | | | | | | | | | | | | | | | have their low bits set to zero. This allows us to optimize out explicit stack alignment code like in stack-align.ll:test4 when it is redundant. Doing this causes the code generator to start turning FI+cst into FI|cst all over the place, which is general goodness (that is the canonical form) except that various pieces of the code generator don't handle OR aggressively. Fix this by introducing a new SelectionDAG::isBaseWithConstantOffset predicate, and using it in places that are looking for ADD(X,CST). The ARM backend in particular was missing a lot of addressing mode folding opportunities around OR. llvm-svn: 125470
* Revisit my fix for PR9028: the issue is that DAGCombine was Chris Lattner2011-02-134-40/+46
| | | | | | | | | generating i8 shift amounts for things like i1024 types. Add an assert in getNode to prevent this from occuring in the future, fix the buggy transformation, revert my previous patch, and document this gotcha in ISDOpcodes.h llvm-svn: 125465
* remove a now-unneccesary cast.Chris Lattner2011-02-131-1/+1
| | | | llvm-svn: 125464
* Remove pointless blank line.Duncan Sands2011-02-131-1/+0
| | | | llvm-svn: 125463
* Teach instsimplify that X+Y>=X+Z is the same as Y>=Z if neither side overflows,Duncan Sands2011-02-131-2/+49
| | | | | | | | plus some variations of this. According to my auto-simplifier this occurs a lot but usually in combination with max/min idioms. Because max/min aren't handled yet this unfortunately doesn't have much effect in the testsuite. llvm-svn: 125462
* Fix a regression from r125393;Nadav Rotem2011-02-131-1/+2
| | | | | | | | | | | | | It caused a crash in MultiSource/Benchmarks/Bullet. Opt hit an assertion with "opt -std-compile-opts" because Constant::getAllOnesValue doesn't know how to handle floats. This patch added a test to reproduce the problem and a check that the destination vector is of integer type. Thank you Benjamin! llvm-svn: 125459
* when legalizing extremely wide shifts, make sure that Chris Lattner2011-02-132-3/+9
| | | | | | | | | the shift amounts are in a suitably wide type so that we don't generate out of range constant shift amounts. This fixes PR9028. llvm-svn: 125458
* fix visitShift to properly zero extend the shift amount if the provided operandChris Lattner2011-02-131-20/+19
| | | | | | | is narrower than the shift register. Doing an anyext provides undefined bits in the top part of the register. llvm-svn: 125457
* implement instcombine folding for things like (x >> c) < 42.Chris Lattner2011-02-131-8/+50
| | | | | | We were previously simplifying divisions, but not right shifts! llvm-svn: 125454
* refactor some code out into a helper method.Chris Lattner2011-02-132-46/+56
| | | | llvm-svn: 125451
* teach SCEV that the scale and addition of an inbounds gep don't NSW.Chris Lattner2011-02-131-2/+5
| | | | | | | This fixes a FIXME in scev-aa.ll (allowing a new no-alias result) and generally makes things more precise. llvm-svn: 125449
* Add encodings and mnemonics for FXSAVE64 and FXRSTOR64.Reid Kleckner2011-02-121-0/+4
| | | | | | | | These are just FXSAVE and FXRSTOR with REX.W prefixes. These versions use 64-bit pointer values instead of 32-bit pointer values in the memory map they dump and restore. llvm-svn: 125446
* Prevent IMPLICIT_DEF/KILL to become a delay filler instruction in SPARC backend.Venkatraman Govindaraju2011-02-121-0/+3
| | | | llvm-svn: 125444
* SimplifyLibCalls: Add missing legalize check on various printf to puts andDaniel Dunbar2011-02-121-5/+9
| | | | | | putchar transforms, their return values are not compatible. llvm-svn: 125442
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