| Commit message (Collapse) | Author | Age | Files | Lines |
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consistently by moving it out of lowering into dag combine.
Add some missing patterns for matching away extended versions of setcc_c.
llvm-svn: 122201
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llvm-svn: 122199
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llvm-svn: 122197
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going through the CSE maps to get it.
llvm-svn: 122196
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llvm-svn: 122193
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headers provide symbols outside namespace std and the LLVM coding standards
state that we should prefix all of them.
llvm-svn: 122192
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enough to teach it that ADDE(0,0) is known 0 except the
low bit, for example.
llvm-svn: 122191
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llvm-svn: 122190
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we don't need -disable-mmx anymore.
llvm-svn: 122189
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llvm-svn: 122187
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generate them.
Now we compile:
define zeroext i8 @X(i8 signext %a, i8 signext %b) nounwind ssp {
entry:
%0 = tail call %0 @llvm.sadd.with.overflow.i8(i8 %a, i8 %b)
%cmp = extractvalue %0 %0, 1
br i1 %cmp, label %if.then, label %if.end
into:
_X: ## @X
## BB#0: ## %entry
subl $12, %esp
movb 16(%esp), %al
addb 20(%esp), %al
jo LBB0_2
Before we were generating:
_X: ## @X
## BB#0: ## %entry
pushl %ebp
movl %esp, %ebp
subl $8, %esp
movb 12(%ebp), %al
testb %al, %al
setge %cl
movb 8(%ebp), %dl
testb %dl, %dl
setge %ah
cmpb %cl, %ah
sete %cl
addb %al, %dl
testb %dl, %dl
setge %al
cmpb %al, %ah
setne %al
andb %cl, %al
testb %al, %al
jne LBB0_2
llvm-svn: 122186
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llvm-svn: 122183
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This resolves a README entry and technically resolves PR4916,
but we still get poor code for the testcase in that PR because
GVN isn't CSE'ing uadd with add, filed as PR8817.
Previously we got:
_test7: ## @test7
addq %rsi, %rdi
cmpq %rdi, %rsi
movl $42, %eax
cmovaq %rsi, %rax
ret
Now we get:
_test7: ## @test7
addq %rsi, %rdi
movl $42, %eax
cmovbq %rsi, %rax
ret
llvm-svn: 122182
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result is dead. This is required for my next patch to not
regress the testsuite.
llvm-svn: 122181
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the old thing end up on the instcombine worklist. Not doing this
can cause an extra top-level iteration of instcombine, burning
compile time.
llvm-svn: 122179
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sadd formed is half the size of the original type. We can
now compile this into a sadd.i8:
unsigned char X(char a, char b) {
int res = a+b;
if ((unsigned )(res+128) > 255U)
abort();
return res;
}
llvm-svn: 122178
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checking to see if the high bits of the original add result were dead.
Inserting a smaller add and zexting back to that size is not good enough.
This is likely to be the fix for 8816.
llvm-svn: 122177
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alternative register allocator that does not require LiveIntervals by specifying
it on the command-line for a target that has StrongPHIElimination enabled by
default.
These checks are pretty meaningless anyways, since StrongPHIElimination and
PHIElimination are never used at the same time.
llvm-svn: 122176
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profitable (or safe) to promote code when the add-with-constant
has other uses.
llvm-svn: 122175
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helper function, clean up comments, and reduce indentation.
No functionality change.
llvm-svn: 122174
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which doesn't affect the memory address being promoted.
llvm-svn: 122172
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does not make the alias set for that pointer volatile, just stores
*to* the pointer.
llvm-svn: 122171
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isel is *required* to split the edge. PHI values get evaluated
on the edge, not in their predecessor block.
llvm-svn: 122170
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llvm-svn: 122168
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llvm-svn: 122167
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llvm-svn: 122165
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which have trapping constant exprs in them due to PHI nodes.
Eliminating them can cause the constant expr to be evalutated
on new paths if the input edges are critical.
llvm-svn: 122164
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llvm-svn: 122160
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llvm-svn: 122158
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llvm-svn: 122157
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llvm-svn: 122156
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It turns out that ppc backend has really weird interdependencies
over different hooks and all stuff is fragile wrt small changes.
This should fix PR8749
llvm-svn: 122155
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This fixed 8615.
llvm-svn: 122150
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the buildbots.
llvm-svn: 122149
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llvm-svn: 122148
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llvm-svn: 122147
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llvm-svn: 122144
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llvm-svn: 122142
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llvm-svn: 122141
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llvm-svn: 122139
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I added a note, but suggestions on how to add a test are really welcome.
llvm-svn: 122138
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llvm-svn: 122135
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llvm-svn: 122134
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use before rematerializing the load.
This allows us to produce:
addps LCPI0_1(%rip), %xmm2
Instead of:
movaps LCPI0_1(%rip), %xmm3
addps %xmm3, %xmm2
Saving a register and an instruction. The standard spiller already knows how to
do this.
llvm-svn: 122133
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llvm-svn: 122132
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ARM::tMOVgpr2gpr. But this check didn't change. As a result, we were getting
misaligned references to the jump table from an ADR instruction.
There is a test case, but unfortunately it's sensitive to random code changes.
<rdar://problem/8782223>
llvm-svn: 122131
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llvm-svn: 122129
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the loop predecessors.
The register can be live-out from a predecessor without being live-in to the
loop header if there is a critical edge from the predecessor.
llvm-svn: 122123
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lib/CodeGen/RegAllocGreedy.cpp:311: error: unused variable 'PhysReg' [-Wunused-variable]
llvm-svn: 122122
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llvm-svn: 122121
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