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* Add this back, as its absence introduces assertions, and it seems to work nowChris Lattner2004-03-011-4/+1
| | | | | | that Instructions are annotable again llvm-svn: 12045
* fix bug in previous checkinTanya Lattner2004-03-011-1/+1
| | | | llvm-svn: 12044
* TargetCacheInfo has been removed; its only uses were to propagate a constantBrian Gaeke2004-03-019-50/+7
| | | | | | | | | (16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in the interest of not breaking things any more than they already are, I'm going to leave the constant alone. llvm-svn: 12043
* Adding new Modulo Scheduling graph files.Tanya Lattner2004-03-013-0/+769
| | | | llvm-svn: 12031
* Removing old graph files with new graph files that I wrote. Updated ↵Tanya Lattner2004-03-013-276/+682
| | | | | | ModuloScheduling pass, but still in progress. llvm-svn: 12030
* Expand on my note-to-selfChris Lattner2004-03-011-1/+3
| | | | llvm-svn: 12029
* Handle passing constant integers to functions much more efficiently. InsteadChris Lattner2004-03-011-10/+23
| | | | | | | | | | | | | | | | | | | | | | | of generating this code: mov %EAX, 4 mov DWORD PTR [%ESP], %EAX mov %AX, 123 movsx %EAX, %AX mov DWORD PTR [%ESP + 4], %EAX call Y we now generate: mov DWORD PTR [%ESP], 4 mov DWORD PTR [%ESP + 4], 123 call Y Which hurts the eyes less. :) Considering that register pressure around call sites is already high (with all of the callee clobber registers n stuff), this may help a lot. llvm-svn: 12028
* Fix a minor code-quality issue. When passing 8 and 16-bit integer constantsChris Lattner2004-03-011-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | to function calls, we would emit dead code, like this: int Y(int, short, double); int X() { Y(4, 123, 4); } --- Old X: sub %ESP, 20 mov %EAX, 4 mov DWORD PTR [%ESP], %EAX *** mov %AX, 123 mov %AX, 123 movsx %EAX, %AX mov DWORD PTR [%ESP + 4], %EAX fld QWORD PTR [.CPIX_0] fstp QWORD PTR [%ESP + 8] call Y mov %EAX, 0 # IMPLICIT_USE %EAX %ESP add %ESP, 20 ret Now we emit: X: sub %ESP, 20 mov %EAX, 4 mov DWORD PTR [%ESP], %EAX mov %AX, 123 movsx %EAX, %AX mov DWORD PTR [%ESP + 4], %EAX fld QWORD PTR [.CPIX_0] fstp QWORD PTR [%ESP + 8] call Y mov %EAX, 0 # IMPLICIT_USE %EAX %ESP add %ESP, 20 ret Next up, eliminate the mov AX and movsx entirely! llvm-svn: 12026
* Disable tail duplication in a case that breaks on Olden/tspChris Lattner2004-03-012-1/+5
| | | | llvm-svn: 12021
* * Remove function to find "main" in a Module, there's a method for thatMisha Brukman2004-02-291-168/+124
| | | | | | * Removing extraneous empty space and empty comment lines llvm-svn: 12014
* Fix -debug-pass=Executions, which relied on Function, Module, and BasicBlockChris Lattner2004-02-292-22/+28
| | | | | | being annotable llvm-svn: 12013
* Fix bug: test/Regression/Transforms/LowerInvoke/2004-02-29-PHICrash.llxChris Lattner2004-02-291-2/+5
| | | | | | ... which tickled the lowerinvoke pass because it used the BCE routines. llvm-svn: 12012
* Add an assertChris Lattner2004-02-291-1/+4
| | | | llvm-svn: 12010
* Add back #include I messed upChris Lattner2004-02-291-0/+1
| | | | llvm-svn: 12009
* Urg, forgot to check this in.Chris Lattner2004-02-291-1/+0
| | | | llvm-svn: 12007
* Remove public header. It's been moved to lib/Target/SparcV9Chris Lattner2004-02-291-0/+95
| | | | llvm-svn: 12004
* Move the private MachineInstrAnnot.h into a private directory.Chris Lattner2004-02-295-5/+5
| | | | llvm-svn: 12003
* Remove use of an ugly headerChris Lattner2004-02-291-1/+0
| | | | llvm-svn: 12002
* Move methods out of .h fileChris Lattner2004-02-291-0/+9
| | | | llvm-svn: 12001
* Add instruction name description.Alkis Evlogimenos2004-02-291-2/+19
| | | | llvm-svn: 11998
* Use correct template for SHLD and SHRD instructions so that the memoryAlkis Evlogimenos2004-02-291-9/+9
| | | | | | operand size is correctly specified. llvm-svn: 11997
* Improve allocation order:Alkis Evlogimenos2004-02-291-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1) For 8-bit registers try to use first the ones that are parts of the same register (AL then AH). This way we only alias 2 16/32-bit registers after allocating 4 8-bit variables. 2) Move EBX as the last register to allocate. This will cause less spills to happen since we will have 8-bit registers available up to register excaustion (assuming we use the allocation order). It would be nice if we could push all of the 8-bit aliased registers towards the end but we much prefer to keep callee saved register to the end to avoid saving them on entry and exit of the function. For example this gives a slight reduction of spills with linear scan on 164.gzip. Before: 11221 asm-printer - Number of machine instrs printed 975 spiller - Number of loads added 675 spiller - Number of stores added 398 spiller - Number of register spills After: 11182 asm-printer - Number of machine instrs printed 952 spiller - Number of loads added 652 spiller - Number of stores added 386 spiller - Number of register spills llvm-svn: 11996
* A big X86 instruction rename. The instructions are renamed to makeAlkis Evlogimenos2004-02-297-752/+752
| | | | | | | | | | | | | | | | their names more decriptive. A name consists of the base name, a default operand size followed by a character per operand with an optional special size. For example: ADD8rr -> add, 8-bit register, 8-bit register IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory llvm-svn: 11995
* Remove dead member variables of SparcV9SchedInfo and TargetSchedInfoBrian Gaeke2004-02-291-10/+0
| | | | llvm-svn: 11994
* Eliminate the X86-specific BMI functions, using BuildMI instead.Chris Lattner2004-02-291-187/+176
| | | | | | Replace uses of addZImm with addImm. llvm-svn: 11992
* Fix a miscompilation of 197.parser that occurs when you have single basicChris Lattner2004-02-291-8/+14
| | | | | | block loops. llvm-svn: 11990
* Fix PR255: [tailduplication] Single basic block loops are very rareChris Lattner2004-02-291-1/+2
| | | | | | | Note that this is a band-aid put over a band-aid. This just undisables tail duplication in on very specific case that it seems to work in. llvm-svn: 11989
* Adjust to change in TII ctor argumentsChris Lattner2004-02-294-13/+5
| | | | llvm-svn: 11987
* Eliminate the distinction between "real" and "unreal" instructionsChris Lattner2004-02-292-3/+3
| | | | llvm-svn: 11986
* These two virtual methods are never called.Chris Lattner2004-02-295-72/+1
| | | | llvm-svn: 11984
* Remove a TON of flags that noone cares aboutChris Lattner2004-02-291-362/+362
| | | | llvm-svn: 11983
* Noone calls these virtual methodsChris Lattner2004-02-291-26/+0
| | | | llvm-svn: 11982
* This is the only file in the system that uses this enum. eliminate it.Chris Lattner2004-02-291-6/+6
| | | | llvm-svn: 11981
* Implement initial prolog/epilog code insertion methods.Chris Lattner2004-02-292-6/+17
| | | | llvm-svn: 11979
* int64_t -> intChris Lattner2004-02-291-1/+1
| | | | llvm-svn: 11977
* Use correct template for ADC instruction with memory operands.Alkis Evlogimenos2004-02-291-2/+2
| | | | llvm-svn: 11974
* Add an instruction selector capable of selecting 'ret void'Chris Lattner2004-02-294-7/+166
| | | | llvm-svn: 11973
* SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename themAlkis Evlogimenos2004-02-283-10/+10
| | | | | | to denote this fact. llvm-svn: 11972
* Floating point loads/stores act on memory operands. Rename them toAlkis Evlogimenos2004-02-285-45/+45
| | | | | | denote this fact. llvm-svn: 11971
* Rename instruction templates to be easier to the human eye toAlkis Evlogimenos2004-02-281-254/+254
| | | | | | | | | | | parse. The name is now I (operand size)*. For example: Im32 -> instruction with 32-bit memory operands. Im16i8 -> instruction with 16-bit memory operands and 8 bit immediate operands. llvm-svn: 11970
* Uncomment instructions that take both an immediate and a memoryAlkis Evlogimenos2004-02-282-16/+11
| | | | | | operand but their sizes differ. llvm-svn: 11969
* Each instruction now has both an ImmType and a MemType. This describesAlkis Evlogimenos2004-02-285-491/+535
| | | | | | | | the size of the immediate and the memory operand on instructions that use them. This resolves problems with instructions that take both a memory and an immediate operand but their sizes differ (i.e. ADDmi32b). llvm-svn: 11967
* Fix typo in commentBrian Gaeke2004-02-281-1/+1
| | | | llvm-svn: 11966
* Implement switch->br and br->switch folding by ripping out the switch->switchChris Lattner2004-02-281-178/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and br->br code and generalizing it. This allows us to compile code like this: int test(Instruction *I) { if (isa<CastInst>(I)) return foo(7); else if (isa<BranchInst>(I)) return foo(123); else if (isa<UnwindInst>(I)) return foo(1241); else if (isa<SetCondInst>(I)) return foo(1); else if (isa<VAArgInst>(I)) return foo(42); return foo(-1); } into: int %_Z4testPN4llvm11InstructionE("struct.llvm::Instruction"* %I) { entry: %tmp.1.i.i.i.i.i.i.i = getelementptr "struct.llvm::Instruction"* %I, long 0, ubyte 4 ; <uint*> [#uses=1] %tmp.2.i.i.i.i.i.i.i = load uint* %tmp.1.i.i.i.i.i.i.i ; <uint> [#uses=2] %tmp.2.i.i.i.i.i.i = seteq uint %tmp.2.i.i.i.i.i.i.i, 27 ; <bool> [#uses=0] switch uint %tmp.2.i.i.i.i.i.i.i, label %endif.0 [ uint 27, label %then.0 uint 2, label %then.1 uint 5, label %then.2 uint 14, label %then.3 uint 15, label %then.3 uint 16, label %then.3 uint 17, label %then.3 uint 18, label %then.3 uint 19, label %then.3 uint 32, label %then.4 ] ... As well as handling the cases in 176.gcc and many other programs more effectively. llvm-svn: 11964
* Change this so that LLC actually tries to run the code generator, though it willChris Lattner2004-02-281-1/+1
| | | | | | immediately abort due to lack of an instruction selector. :) llvm-svn: 11963
* SparcV8 now builds.Chris Lattner2004-02-281-1/+1
| | | | llvm-svn: 11960
* fine grainify namespacificationChris Lattner2004-02-281-5/+3
| | | | llvm-svn: 11959
* Finegrainify namespacificationChris Lattner2004-02-281-6/+3
| | | | llvm-svn: 11958
* Tab completion is our friend.Chris Lattner2004-02-285-4/+4
| | | | llvm-svn: 11957
* Clean up rulesChris Lattner2004-02-281-24/+15
| | | | llvm-svn: 11956
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