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* [DAG] add splat vector support for 'and' in SimplifyDemandedBitsSanjay Patel2017-04-192-2/+2
| | | | | | | | | | | | | | | | | | | | | The patch itself is simple: stop discriminating against vectors in visitAnd() and again in SimplifyDemandedBits(). Some notes for reference: 1. We're not consistent about calls to SimplifyDemandedBits in the various visitXXX functions. Sometimes, we check if the RHS is a constant first. Other times (like here), we just dive in. 2. I'd like to break the vector shackles in steps for the sake of risk minimization, but we could make similar simultaneous changes in other places if we think that would be better. 3. I don't know what the intent of the changed tests in this patch was supposed to be, but since they wiggled in a positive way, I'm just going with that. :) 4. In the rotate tests, note that we can see through non-splat constants. This is a result of D24253. 5. My motivation for being here now is to make D31944 look better, so this is step 1 of N towards improving the vector codegen in that patch without writing any actual new code. Differential Revision: https://reviews.llvm.org/D32230 llvm-svn: 300725
* AMDGPU: Don't align callable functions to 256Matt Arsenault2017-04-191-1/+3
| | | | llvm-svn: 300720
* AMDGPU: Change DivergenceAnalysis for function argumentsMatt Arsenault2017-04-191-9/+16
| | | | | | Stop assuming all functions are kernels. llvm-svn: 300719
* Prefer addAttr(Attribute::AttrKind) over the AttributeList overloadReid Kleckner2017-04-194-59/+39
| | | | | | | | This should simplify the call sites, which typically want to tweak one attribute at a time. It should also avoid creating ephemeral AttributeLists that live forever. llvm-svn: 300718
* [InstCombine] Reduce visitLoadInst() code duplication. NFCI.Davide Italiano2017-04-191-20/+18
| | | | llvm-svn: 300717
* [APInt] Move the 'return *this' from the slow cases of assignment operators ↵Craig Topper2017-04-191-10/+7
| | | | | | | | inline. We should let the compiler see that the fast/slow cases both return *this. I don't think we chain assignments together very often so this shouldn't matter much. llvm-svn: 300715
* [InstSimplify] fold identity shuffles (recursing if needed)Sanjay Patel2017-04-191-1/+76
| | | | | | | | | | | | | | | | | This patch simplifies the examples from D31509 and D31927 (PR30630) and catches the basic identity shuffle tests that Zvi recently added. I'm not sure if we have something like this in DAGCombiner, but we should? It's worth noting that "MaxRecurse / RecursionLimit" is only 3 on entry at the moment. We might want to bump that up if there are longer shuffle chains like this in the wild. For now, we're ignoring shuffles that have undef mask elements because it's not clear how those should be handled. Differential Revision: https://reviews.llvm.org/D31960 llvm-svn: 300714
* use 'auto' with 'dyn_cast' and fix formatting; NFCSanjay Patel2017-04-191-8/+7
| | | | llvm-svn: 300713
* Revert r300697 which causes buildbot failure.Dehao Chen2017-04-192-47/+43
| | | | llvm-svn: 300708
* [Hexagon] Generate proper offset in opt-addr-modeKrzysztof Parzyszek2017-04-192-11/+8
| | | | | | | | | Also, make a few changes to allow using the pass in .mir testcases. Among other things, change the abbreviation from opt-amode to amode-opt, because otherwise lit would expand the "opt" part to the full path to the opt binary. llvm-svn: 300707
* [Hexagon] Remove RDefMap, use Liveness:getNearestAliasedRef insteadKrzysztof Parzyszek2017-04-191-48/+5
| | | | llvm-svn: 300706
* [RDF] Switch NodeList to SmallVector from std::vectorKrzysztof Parzyszek2017-04-191-1/+2
| | | | | | | The list has a single element 75+% of the time, reservation of 4 elements is sufficient in 95% of cases. llvm-svn: 300705
* [RDF] Use faster version of findBlockKrzysztof Parzyszek2017-04-191-1/+1
| | | | llvm-svn: 300704
* [RDF] Cache register units for reg masks instead of recalculating themKrzysztof Parzyszek2017-04-192-31/+29
| | | | llvm-svn: 300702
* [Hexagon] Cache reached blocks in bit tracker instead of scanning listKrzysztof Parzyszek2017-04-192-10/+10
| | | | llvm-svn: 300701
* Using address range map to speedup finding inline stack for address.Dehao Chen2017-04-192-43/+47
| | | | | | | | | | | | | | | | | | | | Summary: In the current implementation, to find inline stack for an address incurs expensive linear search in 2 places: * linear search for the top-level DIE * recursive linear traverse the DIE tree to find the path to the leaf DIE In this patch, a map is built from address to its corresponding leaf DIE. The inline stack is built by traversing from the leaf DIE up to the root DIE. This speeds up batch symbolization by ~10X without noticible memory overhead. Reviewers: dblaikie Reviewed By: dblaikie Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32177 llvm-svn: 300697
* [InstSimplify] Deduce correct type for vector GEP.Davide Italiano2017-04-191-0/+2
| | | | | | | | | | InstSimplify returned the wrong type when simplifying a vector GEP and we ended up crashing when trying to replace all uses with the new value. Fixes PR32697. Differential Revision: https://reviews.llvm.org/D32180 llvm-svn: 300693
* [DAG] Loop over remaining candidates on successful merge of stores ofNirav Dave2017-04-191-30/+43
| | | | | | extracted vectors types. NFCI. llvm-svn: 300688
* [GlobalIsel][X86] support G_TRUNC selection.Igor Breger2017-04-192-0/+62
| | | | | | | | | | | | | | | | Summary: [GlobalIsel][X86] support G_TRUNC selection. Add regbank-select and legalizer tests. Currently legalization of trunc i64 on 32bit platform not supported. Reviewers: ab, zvi, rovka Reviewed By: zvi Subscribers: dberris, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D32115 llvm-svn: 300678
* Revert "ARMFrameLowering: Reserve emergency spill slot for large arguments"Renato Golin2017-04-191-41/+8
| | | | | | This reverts commit r300639, as it broke self-hosting on ARM. PR32709. llvm-svn: 300668
* [ARM] GlobalISel: Add support for G_MULDiana Picus2017-04-193-1/+12
| | | | | | | | Support G_MUL, very similar to G_ADD and G_SUB. The only difference is in the instruction selector, where we have to select either MUL or MULv5 depending on the target. llvm-svn: 300665
* [GlobalISel] Support vector-of-pointers in LLTKristof Beyls2017-04-194-17/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes PR32471. As comment 10 on that bug report highlights (https://bugs.llvm.org//show_bug.cgi?id=32471#c10), there are quite a few different defendable design tradeoffs that could be made, including not representing pointers at all in LLT. I decided to go for representing vector-of-pointer as a concept in LLT, while keeping the size of the LLT type 64 bits (this is an increase from 48 bits before). My rationale for keeping pointers explicit is that on some targets probably it's very handy to have the distinction between pointer and non-pointer (e.g. 68K has a different register bank for pointers IIRC). If we keep a scalar pointer, it probably is easiest to also have a vector-of-pointers to keep LLT relatively conceptually clean and orthogonal, while we don't have a very strong reason to break that orthogonality. Once we gain more experience on the use of LLT, we can of course reconsider this direction. Rejecting vector-of-pointer types in the IRTranslator is also an option to avoid the crash reported in PR32471, but that is only a very short-term solution; also needs quite a bit of code tweaks in places, and is probably fragile. Therefore I didn't consider this the best option. llvm-svn: 300664
* [GlobalISel] Remove non-determinism from IRTranslator.Kristof Beyls2017-04-191-12/+16
| | | | | | | | | | | This showed up in r300535/r300537, which were reverted in r300538 due to some of the introduced tests in there failing on some bots, due to the non-determinism fixed in this commit. Re-committing r300535/r300537 will add 2 tests for the change in this commit. llvm-svn: 300663
* Revert r300657 due to crashes in stage2 of bootstraps:Chandler Carruth2017-04-191-27/+0
| | | | | | | | | | | | http://lab.llvm.org:8011/builders/clang-with-lto-ubuntu/builds/2476/steps/build-stage2-LLVMgold.so/logs/stdio http://bb.pgr.jp/builders/clang-3stage-x86_64-linux/builds/15036/steps/build_llvmclang/logs/stdio I've updated the commit thread, reverting to get the bots back to green. Original commit summary: [JumpThread] We want to fold (not thread) when all predecessor go to single BB's successor. llvm-svn: 300662
* [JumpThread] We want to fold (not thread) when all predecessor go to single ↵Xin Tong2017-04-191-0/+27
| | | | | | | | | | | | | | | | BB's successor. . Summary: In case all predecessor go to a single successor of current BB. We want to fold (not thread). Reviewers: efriedma, sanjoy Reviewed By: sanjoy Subscribers: dberlin, majnemer, llvm-commits Differential Revision: https://reviews.llvm.org/D30869 llvm-svn: 300657
* ARM: Use methods to access data stored with frame instructionsSerge Pavlov2017-04-193-8/+27
| | | | | | | | | | | In r300196 several methods were added to TarfetInstrInfo to access data stored with call frame setup/destroy instructions. This change replaces calls to getOperand with calls to such special methods in ARM target. Differential Revision: https://reviews.llvm.org/D32127 llvm-svn: 300655
* Remove buggy 'addAttributes(unsigned, AttrBuilder)' overloadReid Kleckner2017-04-191-21/+15
| | | | | | | | | | The 'addAttributes(unsigned, AttrBuilder)' overload delegated to 'get' instead of 'addAttributes'. Since we can implicitly construct an AttrBuilder from an AttributeSet, just standardize on AttrBuilder. llvm-svn: 300651
* [libFuzzer] update -help: mention -exact_artifact_path in help for ↵Kostya Serebryany2017-04-191-2/+6
| | | | | | -minimize_crash and -cleanse_crash llvm-svn: 300642
* [AVR] Migrate to new MCAsmInfo CodePointerSizeLeslie Zhai2017-04-191-1/+0
| | | | | | | | | | | | Reviewers: dylanmckay, rengolin, kzhuravl, jroelofs Reviewed By: kzhuravl, jroelofs Subscribers: kzhuravl, llvm-commits Differential Revision: https://reviews.llvm.org/D32154 llvm-svn: 300641
* ARMFrameLowering: Reserve emergency spill slot for large argumentsMatthias Braun2017-04-191-8/+41
| | | | | | | | | | | | We need to reserve an emergency spill slot in cases with large argument types that could overflow immediate offsets for FP relative address calculations. rdar://31317893 Differential Revision: https://reviews.llvm.org/D31643 llvm-svn: 300639
* [DataLayout] Removed default value from a variable that isn't used without ↵Craig Topper2017-04-191-3/+2
| | | | | | being overwritten. Make variable an enum instead of an int to avoid a cast later. NFC llvm-svn: 300634
* Allow suppressing host and target info in VersionPrinterXin Tong2017-04-191-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: VersionPrinter by default outputs information about the Host CPU and Default target. Printing this information requires linking in a large amount of data, such as supported target triples as C strings, which in turn bloats the binary size. Enable a new CMake option LLVM_VERSION_PRINTER_SHOW_HOST_TARGET_INFO which controls printing of the host and target info. This allows the target triple names to be dead-code stripped. This is a nice win for LLVM clients that wish to minimize their binary size, such as graphics drivers. By default this is ON, so there is no change in the default behavior. Clients who wish to suppress this printing can do so by setting this option to off via CMake. A test app on Linux that uses ParseCommandLineOptions() shows a binary size reduction of 23KB (from 149K to 126K) for a Release build, and 24KB (from 135K to 111K) in a MinSizeRel build. Reviewers: klimek, beanz, bogner, chandlerc, compnerd Reviewed By: compnerd Patch by pammon (Peter Ammon) ! Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30904 llvm-svn: 300630
* [AVR] Fix the buildDylan McKay2017-04-181-1/+1
| | | | | | 'PointerSize' was renamed to 'CodePointerSize'. llvm-svn: 300629
* [ConstantRange] Optimize APInt creation in getSignedMax/getSignedMin.Craig Topper2017-04-181-8/+8
| | | | | | | | | | We were creating an APInt at the top of these methods that isn't always returned. For ranges wider than 64-bits this results in an allocation and deallocation when its not used. In getSignedMax we were creating Upper-1 to use in a compare and then creating it again for a return value. The compiler is unable to determine that these can be shared. So help it out and create the Upper-1 in a temporary that can be reused. This provides a little compile time improvement. llvm-svn: 300621
* Fix crash in AttributeList::addAttributes, add testReid Kleckner2017-04-181-0/+3
| | | | llvm-svn: 300614
* Add a getPointerOperandType() helper to LoadInst and StoreInst; NFCSanjoy Das2017-04-184-10/+7
| | | | | | I will use this in a later change. llvm-svn: 300613
* [MemoryBuiltins] Add isMallocOrCallocLikeFn so BasicAA can check for both at ↵Craig Topper2017-04-183-3/+11
| | | | | | | | | | | | | | the same time BasicAA wants to know if a function is either a malloc or calloc like function. Currently we have to check both separately. This means both calls check if its an intrinsic, query TLI, check the nobuiltin attribute, scan the AllocationFnData, etc. This patch adds a isMallocOrCallocLikeFn so we can go through all of the checks once per call. This also changes the one other location I saw that called both together. Differential Revision: https://reviews.llvm.org/D32188 llvm-svn: 300608
* [LoopReroll] Prefer hasNUses/hasNUses or more as they're cheaper. NFCI.Davide Italiano2017-04-181-2/+2
| | | | llvm-svn: 300607
* DAG: Make mayBeEmittedAsTailCall parameter constMatt Arsenault2017-04-1810-11/+11
| | | | llvm-svn: 300603
* Fix typoMatt Arsenault2017-04-181-1/+1
| | | | llvm-svn: 300597
* AMDGPU: Make MFI fields privateMatt Arsenault2017-04-182-6/+8
| | | | llvm-svn: 300596
* [MemoryBuiltins] Use ImmutableCallSite instead of CallSite to remove a ↵Craig Topper2017-04-181-4/+4
| | | | | | const_cast and const correct. NFCI llvm-svn: 300585
* NewGVN: Fix memory congruence verification. The return true should be a ↵Daniel Berlin2017-04-181-8/+8
| | | | | | return false. Merge the appropriate if statements so it doesn't happen again. llvm-svn: 300584
* [X86] Keep EXTRACT_VECTOR_ELT result type as f128 for Android x86_64.Chih-Hung Hsieh2017-04-182-3/+6
| | | | | | | | | | Android x86_64 target uses f128 type and stores f128 values in %xmm* registers. SoftenFloatRes_EXTRACT_VECTOR_ELT should not convert result value from f128 to i128. Differential Revision: http://reviews.llvm.org/D32102 llvm-svn: 300583
* [APInt] Inline the single word case of lshrInPlace similar to what we do for ↵Craig Topper2017-04-181-9/+1
| | | | | | <<=. llvm-svn: 300577
* [SLP vectorizer] Allow phi node reordering in tryToVectorizeList.Easwaran Raman2017-04-181-3/+9
| | | | | | | | | | | | | | | | | In tryToVectorizeList, under a very limited circumstance (when entered from tryToVectorizePair), the values may be reordered (swapped) and the SLP tree is built with the new order. This extends that to the case when starting from phis in vectorizeChainsInBlock when there are exactly two phis. The textual order of phi nodes shouldn't really matter. Without this change, the loop body in the accompnaying test case is fully vectorized when we swap the orde of the phis but not with this order. While this doesn't solve the phi-ordering problem in a general way (for more than 2 phis), this is simple fix that piggybacks on an existing mechanism and is useful in cases like multiplying two complex numbers. Differential revision: https://reviews.llvm.org/D32065 llvm-svn: 300574
* [X86] Use for-range loop. NFCI.Simon Pilgrim2017-04-181-2/+2
| | | | llvm-svn: 300567
* [APInt] Use lshrInPlace to replace lshr where possibleCraig Topper2017-04-1817-55/+60
| | | | | | | | | | This patch uses lshrInPlace to replace code where the object that lshr is called on is being overwritten with the result. This adds an lshrInPlace(const APInt &) version as well. Differential Revision: https://reviews.llvm.org/D32155 llvm-svn: 300566
* NewGVN: Don't waste time value numbering unreachable blocksDaniel Berlin2017-04-181-17/+6
| | | | llvm-svn: 300565
* [DAG] Improve store merge candidate pruning.Nirav Dave2017-04-181-0/+21
| | | | | | | | | | | | | | Remove non-consecutive stores from store merge candidate search as they cannot be merged and will prevent us from finding subsequent mergeable store cases. Reviewers: jyknight, bogner, javed.absar, spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32086 llvm-svn: 300561
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