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* Fix a crash compiling povray on UINT_TO_FP from i16.Chris Lattner2005-01-121-3/+1
| | | | llvm-svn: 19499
* Add an option to view the selection dags as they are generated.Chris Lattner2005-01-121-0/+11
| | | | llvm-svn: 19498
* There are no [mem] op= reg instructions for FP, so remove their entries.Chris Lattner2005-01-121-12/+11
| | | | llvm-svn: 19496
* Fix a bug where we didn't insert FP_REG_KILL instructions into MBB's thatChris Lattner2005-01-121-0/+15
| | | | | | | contain FP PHI nodes but no other FP defining instructions. This fixes 183.equake llvm-svn: 19495
* Fold TRUNCATE (LOAD P) into a smaller load from P.Chris Lattner2005-01-121-0/+15
| | | | llvm-svn: 19494
* Be more careful about order of arg evalution for CopyToReg nodes. This shrinksChris Lattner2005-01-121-2/+47
| | | | | | | | | 256.bzip2 from 7142 to 7103 lines of .s file. Second, add initial support for folding loads into compares, though this code is dynamically dead for now. :( llvm-svn: 19493
* Fold some more [mem] op= val operators. This allows us to things like thisChris Lattner2005-01-121-2/+39
| | | | | | | | | | | | | several times in 256.bzip2: mov %EAX, DWORD PTR [%ESP + 204] - mov %EAX, DWORD PTR [%EAX] - or %EAX, 2097152 - mov %ECX, DWORD PTR [%ESP + 204] - mov DWORD PTR [%ECX], %EAX + or DWORD PTR [%EAX], 2097152 llvm-svn: 19492
* Fold loads into sign/zero extends. instead of:Chris Lattner2005-01-111-2/+25
| | | | | | | | | | | mov %AL, BYTE PTR [%EDX + l18_length_code] movzx %EAX, %AL Emit: movzx %EAX, BYTE PTR [%EDX + l18_length_code] llvm-svn: 19489
* Comment out debug code :)Chris Lattner2005-01-111-2/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | Select [mem] += Val operations. For constants, we used to get: mov %ECX, -32768 add %ECX, DWORD PTR [l4_match_start] mov DWORD PTR [l4_match_start], %ECX Now we get: add DWORD PTR [l4_match_start], -32768 For other values we used to get: mov %EBP, %EDI ;; because the add destroys the value add %EBP, DWORD PTR [l4_input_len] mov DWORD PTR [l4_input_len], %EBP now we get: add DWORD PTR [l4_input_len], %EDI Both of these use less registers than the alternative, are faster and smaller. llvm-svn: 19488
* Handle the global address case here, not just the offset case.Chris Lattner2005-01-111-4/+11
| | | | llvm-svn: 19487
* Treat int constants as not requiring a register, since they are almost alwaysChris Lattner2005-01-111-14/+22
| | | | | | folded into an instruction. llvm-svn: 19486
* Print the value types in the nodes of the graphChris Lattner2005-01-111-0/+19
| | | | llvm-svn: 19485
* add an assertion, avoid creating copyfromreg/copytoreg pairs that are theChris Lattner2005-01-111-2/+5
| | | | | | same for PHI nodes. llvm-svn: 19484
* * Factor a bunch of binary operator cases into shared code.Chris Lattner2005-01-111-192/+241
| | | | | | | * Fold loads into Add, sub, and, or, xor and mul when possible. * Codegen shl X, 1 as add X, X llvm-svn: 19483
* Clear the whole array, always.Chris Lattner2005-01-111-1/+1
| | | | llvm-svn: 19482
* Fold multiplies by 3,5,9 into addressing modes when possible.Chris Lattner2005-01-111-0/+28
| | | | llvm-svn: 19480
* Squelch optimized warning.Chris Lattner2005-01-111-0/+1
| | | | llvm-svn: 19475
* Instead of generating stuff like this:Chris Lattner2005-01-111-1/+14
| | | | | | | | | | | | | | | mov %ECX, %EAX add %ECX, 32768 mov %SI, WORD PTR [2*%ECX + l13_prev] Generate this: mov %SI, WORD PTR [2*%ECX + l13_prev + 65536] This occurs when you have a GEP instruction where an index is "something + imm". llvm-svn: 19472
* Implement MEMCPY natively in terms of rep movs*Chris Lattner2005-01-111-1/+45
| | | | llvm-svn: 19468
* Implement memset -> rep stos*Chris Lattner2005-01-111-3/+64
| | | | llvm-svn: 19467
* Announce that we don't support mem ops yet.Chris Lattner2005-01-111-1/+5
| | | | llvm-svn: 19466
* Teach legalize to lower MEMSET/MEMCPY/MEMMOVE operations if the targetChris Lattner2005-01-111-7/+52
| | | | | | does not support them. llvm-svn: 19465
* Print new operations.Chris Lattner2005-01-111-0/+3
| | | | llvm-svn: 19464
* Turn memset/memcpy/memmove into the corresponding operations.Chris Lattner2005-01-111-52/+15
| | | | llvm-svn: 19463
* Teach the address selector to make 'reg+reg' addressing modes.Chris Lattner2005-01-111-2/+11
| | | | llvm-svn: 19457
* Add the LOADABLE_MODULE=1 directive to indicate that this shared library isReid Spencer2005-01-111-0/+1
| | | | | | intended to be a dlopenable module and not a "plain" shared library. llvm-svn: 19456
* Emit NOT instructions.Chris Lattner2005-01-111-1/+14
| | | | llvm-svn: 19455
* shift X, 0 -> XChris Lattner2005-01-111-0/+6
| | | | llvm-svn: 19453
* Fix a bug emitting branches that broke a lot of programs.Chris Lattner2005-01-111-12/+22
| | | | llvm-svn: 19452
* Be more careful where we set ContainsFPCode. We were missing a set in theChris Lattner2005-01-111-15/+10
| | | | | | | | int -> FP casting code. Note that we don't have to set it for FP operations that take FP values as operands: whatever produces the FP value will set the flag. llvm-svn: 19451
* Fix a major bug in setcc/cmov folding, where we accidentallyChris Lattner2005-01-111-6/+16
| | | | | | inverted the sense of the comparison. llvm-svn: 19450
* Take register pressure into account when we have to decide whether toChris Lattner2005-01-111-41/+232
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | evaluate the LHS or the RHS of an operation first. This causes good things to happen. For example, instead of compiling a loop to this: .LBBstrength_result7_1: # loopentry movl 16(%esp), %edi movl (%edi), %edi ;;; LOAD movl (%ecx), %ebx movl $2, (%eax,%ebx,4) movl (%edx), %ebx movl %esi, %ebp addl $21, %ebp addl $42, %esi cmpl $0, %edi ;;; USE cmovne %esi, %ebp cmpl %ebp, %ebx movl %ebp, %esi jg .LBBstrength_result7_1 We now compile it to this: .LBBstrength_result7_1: # loopentry movl %edi, %ebx addl $42, %ebx addl $21, %edi movl (%ecx), %ebp ;; LOAD cmpl $0, %ebp ;; USE cmovne %ebx, %edi movl (%edx), %ebx movl $2, (%eax,%ebx,4) movl (%esi), %ebx cmpl %edi, %ebx jg .LBBstrength_result7_1 Which reduces register pressure enough (in this case) to avoid spilling in the loop. As another example, consider the CodeGen/X86/regpressure.ll testcase. We used to generate this code for both cases: regpressure1: subl $32, %esp movl %esi, 12(%esp) movl %edi, 8(%esp) movl %ebx, 4(%esp) movl %ebp, (%esp) movl 36(%esp), %ecx movl (%ecx), %eax movl 4(%ecx), %edx movl %edx, 24(%esp) movl 8(%ecx), %edx movl %edx, 16(%esp) movl 12(%ecx), %edx movl 16(%ecx), %esi movl 20(%ecx), %edi movl 24(%ecx), %ebx movl %ebx, 28(%esp) movl 28(%ecx), %ebx movl 32(%ecx), %ebp movl %ebp, 20(%esp) movl 36(%ecx), %ecx imull 24(%esp), %eax imull 16(%esp), %eax imull %edx, %eax imull %esi, %eax imull %edi, %eax imull 28(%esp), %eax imull %ebx, %eax imull 20(%esp), %eax imull %ecx, %eax movl (%esp), %ebp movl 4(%esp), %ebx movl 8(%esp), %edi movl 12(%esp), %esi addl $32, %esp ret This code is basically trying to do all of the loads first, then execute all of the multiplies. Because we run out of registers, lots of spill code happens. We now generate this code for both cases: regpressure1: movl 4(%esp), %ecx movl (%ecx), %eax movl 4(%ecx), %edx imull %edx, %eax movl 8(%ecx), %edx imull %edx, %eax movl 12(%ecx), %edx imull %edx, %eax movl 16(%ecx), %edx imull %edx, %eax movl 20(%ecx), %edx imull %edx, %eax movl 24(%ecx), %edx imull %edx, %eax movl 28(%ecx), %edx imull %edx, %eax movl 32(%ecx), %edx imull %edx, %eax movl 36(%ecx), %ecx imull %ecx, %eax ret which is much nicer (when we fold loads into the muls it will be even better). The old instruction selector used to produce the good code for regpressure1 but not for regpressure2, as it depended on the order of operations in the LLVM code. llvm-svn: 19449
* Print SelectionDAGs bottom up, include extra info in the node labelsChris Lattner2005-01-111-3/+38
| | | | llvm-svn: 19447
* Add a marker for the graph root.Chris Lattner2005-01-101-0/+6
| | | | llvm-svn: 19445
* Put the operation name in each node, put the function name on the graph.Chris Lattner2005-01-101-0/+17
| | | | llvm-svn: 19444
* Split out SDNode::getOperationName into its own method.Chris Lattner2005-01-101-89/+88
| | | | llvm-svn: 19443
* Implement initial selectiondag printing support. This gets us a niceChris Lattner2005-01-101-0/+48
| | | | | | graph with no labels! :) llvm-svn: 19441
* Fold setcc instructions into selects.Chris Lattner2005-01-101-18/+116
| | | | llvm-svn: 19438
* Add conditional moves for the parity flag.Chris Lattner2005-01-102-0/+36
| | | | llvm-svn: 19437
* Lower to the correct functions. This fixes FreeBench/fourinarowChris Lattner2005-01-101-2/+2
| | | | llvm-svn: 19436
* Implement 8-bit multiply for X86.Chris Lattner2005-01-101-1/+6
| | | | llvm-svn: 19435
* Rework constant pool handling so that function constant pools are no longerChris Lattner2005-01-101-21/+24
| | | | | | | leaked to the system. Now they are destroyed with the JITMemoryManager is destroyed. llvm-svn: 19434
* Apply feedback from Chris.Jeff Cohen2005-01-101-2/+2
| | | | llvm-svn: 19432
* Apply feed back from Chris:Jeff Cohen2005-01-101-1/+1
| | | | | | | 1. Rename createLoaderPass to CreateProfileLoaderPass 2. Opt shouldn't use the pass registered in CodeGen. llvm-svn: 19431
* Implement a couple of more simplifications. This lets us codegen:Chris Lattner2005-01-101-12/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | int test2(int * P, int* Q, int A, int B) { return P+A == P; } into: test2: movl 4(%esp), %eax movl 12(%esp), %eax shll $2, %eax cmpl $0, %eax sete %al movzbl %al, %eax ret instead of: test2: movl 4(%esp), %eax movl 12(%esp), %ecx leal (%eax,%ecx,4), %ecx cmpl %eax, %ecx sete %al movzbl %al, %eax ret ICC is producing worse code: test2: movl 4(%esp), %eax #8.5 movl 12(%esp), %edx #8.5 lea (%edx,%edx), %ecx #9.9 addl %ecx, %ecx #9.9 addl %eax, %ecx #9.9 cmpl %eax, %ecx #9.16 movl $0, %eax #9.16 sete %al #9.16 ret #9.16 as is GCC (looks like our old code): test2: movl 4(%esp), %edx movl 12(%esp), %eax leal (%edx,%eax,4), %ecx cmpl %edx, %ecx sete %al movzbl %al, %eax ret llvm-svn: 19430
* Fix incorrect constant folds, fixing Stepanov after the SHR patch.Chris Lattner2005-01-101-4/+4
| | | | llvm-svn: 19429
* Constant fold shifts, turning this loop:Chris Lattner2005-01-101-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | .LBB_Z5test0PdS__3: # no_exit.1 fldl data(,%eax,8) fldl 24(%esp) faddp %st(1) fstl 24(%esp) incl %eax movl $16000, %ecx sarl $3, %ecx cmpl %eax, %ecx fstpl 16(%esp) #FP_REG_KILL jg .LBB_Z5test0PdS__3 # no_exit.1 into: .LBB_Z5test0PdS__3: # no_exit.1 fldl data(,%eax,8) fldl 24(%esp) faddp %st(1) fstl 24(%esp) incl %eax cmpl $2000, %eax fstpl 16(%esp) #FP_REG_KILL jl .LBB_Z5test0PdS__3 # no_exit.1 llvm-svn: 19427
* Rename Unix/*.cpp and Win32/*.cpp to have a *.inc suffix so that the sillyReid Spencer2005-01-0923-15/+15
| | | | | | | gdb debugger doesn't get confused on which file it is reading (the one in lib/System or the one in lib/System/{Win32,Unix}) llvm-svn: 19426
* Add some folds for == and != comparisons. This allows us toChris Lattner2005-01-091-41/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | codegen this loop in stepanov: no_exit.i: ; preds = %entry, %no_exit.i, %then.i, %_Z5checkd.exit %i.0.0 = phi int [ 0, %entry ], [ %i.0.0, %no_exit.i ], [ %inc.0, %_Z5checkd.exit ], [ %inc.012, %then.i ] ; <int> [#uses=3] %indvar = phi uint [ %indvar.next, %no_exit.i ], [ 0, %entry ], [ 0, %then.i ], [ 0, %_Z5checkd.exit ] ; <uint> [#uses=3] %result_addr.i.0 = phi double [ %tmp.4.i.i, %no_exit.i ], [ 0.000000e+00, %entry ], [ 0.000000e+00, %then.i ], [ 0.000000e+00, %_Z5checkd.exit ] ; <double> [#uses=1] %first_addr.0.i.2.rec = cast uint %indvar to int ; <int> [#uses=1] %first_addr.0.i.2 = getelementptr [2000 x double]* %data, int 0, uint %indvar ; <double*> [#uses=1] %inc.i.rec = add int %first_addr.0.i.2.rec, 1 ; <int> [#uses=1] %inc.i = getelementptr [2000 x double]* %data, int 0, int %inc.i.rec ; <double*> [#uses=1] %tmp.3.i.i = load double* %first_addr.0.i.2 ; <double> [#uses=1] %tmp.4.i.i = add double %result_addr.i.0, %tmp.3.i.i ; <double> [#uses=2] %tmp.2.i = seteq double* %inc.i, getelementptr ([2000 x double]* %data, int 0, int 2000) ; <bool> [#uses=1] %indvar.next = add uint %indvar, 1 ; <uint> [#uses=1] br bool %tmp.2.i, label %_Z10accumulateIPddET0_T_S2_S1_.exit, label %no_exit.i To this: .LBB_Z4testIPddEvT_S1_T0__1: # no_exit.i fldl data(,%eax,8) fldl 16(%esp) faddp %st(1) fstpl 16(%esp) incl %eax movl %eax, %ecx shll $3, %ecx cmpl $16000, %ecx #FP_REG_KILL jne .LBB_Z4testIPddEvT_S1_T0__1 # no_exit.i instead of this: .LBB_Z4testIPddEvT_S1_T0__1: # no_exit.i fldl data(,%eax,8) fldl 16(%esp) faddp %st(1) fstpl 16(%esp) incl %eax leal data(,%eax,8), %ecx leal data+16000, %edx cmpl %edx, %ecx #FP_REG_KILL jne .LBB_Z4testIPddEvT_S1_T0__1 # no_exit.i llvm-svn: 19425
* Add last four createXxxPass functionsJeff Cohen2005-01-094-0/+12
| | | | llvm-svn: 19424
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