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* [FastISel][X86] Add support for the frameaddress intrinsic.Juergen Ributzka2014-06-111-0/+52
| | | | llvm-svn: 210709
* [AArch64] Basic Sched Model for Cortex-A57.Chad Rosier2014-06-113-1/+818
| | | | | | | Patch by Dave Estes<cestes@codeaurora.org> Differential Revision: http://reviews.llvm.org/D4008 llvm-svn: 210705
* R600: Set correct InstrItinClass for instructions using *Helper classesTom Stellard2014-06-111-3/+3
| | | | | | | | | We weren't doing this before, so all instruction using the *Helper classes were considered for any ALU slot. This fixes a hang in the builtin-char-clz-1.0.generated.cl piglit test. llvm-svn: 210703
* R600: BCNT_INT is a vector only instructionTom Stellard2014-06-111-1/+1
| | | | llvm-svn: 210702
* ARM: honor hex immediate formatting for ldr/str i12 offsets.Jim Grosbach2014-06-111-2/+2
| | | | | | | | | | | | | | | | | Previously we would always print the offset as decimal, regardless of the formatting requested. Now we use the formatImm() helper so the value is printed as the client (LLDB in the motivating example) requested. Before: ldr.w r8, [sp, #180] @ always After: ldr.w r8, [sp, #0xb4] @ when printing hex immediates ldr.w r8, [sp, #0180] @ when printing decimal immediates rdar://17237103 llvm-svn: 210701
* R600/SI: Fix bitcast between v2i32 and f64Matt Arsenault2014-06-111-0/+2
| | | | | | | | | | This is the same problem fixed in r210664 for more types. The test passes without this fix. For some reason I'm only hitting this when creating selects lowered to v2i32 selects. llvm-svn: 210692
* Use std::error_code instead of llvm::error_code.Rafael Espindola2014-06-1115-328/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The idea of this patch is to turn llvm/Support/system_error.h into a transitional header that just brings in the erorr_code api to the llvm namespace. I will remove it shortly afterwards. The cases where the general idea needed some tweaking: * std::errc is a namespace in msvc, so we cannot use "using std::errc". I could add an #ifdef, but there were not that many uses, so I just added std:: to them in this patch. * Template specialization had to be moved to the std namespace in this patch set already. * The msvc implementation of default_error_condition doesn't seem to provide the same transformations as we need. Not too surprising since the standard doesn't actually say what "equivalent" means. I fixed the problem by keeping our old mapping and using it at error_code construction time. Despite these shortcomings I think this is still a good thing. Some reasons: * The different implementations of system_error might improve over time. * It removes 925 lines of code from llvm already. * It removes 6313 bytes from the text segment of the clang binary when it is built with gcc and 2816 bytes when building with clang and libstdc++. llvm-svn: 210687
* Fix assert comments in Instruction.cpp.Chad Rosier2014-06-111-6/+6
| | | | llvm-svn: 210684
* R600/SI: Update place using old subtarget predicateMatt Arsenault2014-06-111-2/+2
| | | | llvm-svn: 210683
* R600/SI: Add common 64-bit LDS atomicsMatt Arsenault2014-06-113-17/+43
| | | | llvm-svn: 210680
* R600/SI: Add instruction definitions for 64-bit LDS atomicsMatt Arsenault2014-06-111-0/+47
| | | | llvm-svn: 210679
* R600/SI: Add 32-bit LDS atomic cmpxchgMatt Arsenault2014-06-112-0/+24
| | | | llvm-svn: 210678
* R600/SI: Use LDS atomic inc / decMatt Arsenault2014-06-111-0/+16
| | | | llvm-svn: 210677
* R600/SI: Add other LDS atomic operationsMatt Arsenault2014-06-111-3/+12
| | | | llvm-svn: 210676
* R600/SI: Add instruction definitions for more LDS opsMatt Arsenault2014-06-112-0/+104
| | | | llvm-svn: 210675
* R600/SI: Fix backwards names for local atomic instructions.Matt Arsenault2014-06-111-4/+4
| | | | | | | The manual lists them as *_RTN_U32, not *_U32_RTN, which is more consistent with how every other sized instruction is named. llvm-svn: 210674
* R600/SI: Refactor local atomics.Matt Arsenault2014-06-112-11/+30
| | | | | | | Use patterns that will also match the immediate offset to match the normal read / writes. llvm-svn: 210673
* R600/SI: Use v_cvt_f32_ubyte* instructionsMatt Arsenault2014-06-117-5/+170
| | | | | | | This eliminates extra extract instructions when loading an i8 vector to a float vector. llvm-svn: 210666
* R600/SI: Fix selection failure on scalar_to_vectorMatt Arsenault2014-06-112-6/+23
| | | | | | | | | | | There seem to be only 2 places that produce these, and it's kind of tricky to hit them. Also fixes failure to bitcast between i64 and v2f32, although this for some reason wasn't actually broken in the simple bitcast testcase, but did in the scalar_to_vector one. llvm-svn: 210664
* X86: add stringy name for X86ISD::LCMPXCHG16_DAGTim Northover2014-06-111-0/+1
| | | | | | | I don't know what "target specific node #383" is, and I don't want to have to. llvm-svn: 210663
* Revert r210613 to conform to coding standards.Eric Christopher2014-06-111-1/+1
| | | | | | Thanks Duncan for noticing. llvm-svn: 210662
* [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register ↵Matheus Almeida2014-06-115-1/+121
| | | | | | | | | | | | | | with Hazard Barrier). Summary: These instructions are available in ISAs >= mips32/mips64. For mips32r6/mips64r6, jr.hb has a new encoding format. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4019 llvm-svn: 210654
* Add AVX512 masked leadz instrinsic support.Cameron McInally2014-06-111-0/+22
| | | | llvm-svn: 210652
* [X86] Refactor the logic to select horizontal adds/subs to a helper function.Andrea Di Biagio2014-06-111-90/+118
| | | | | | | | | | | | | | | This patch moves part of the logic implemented by the target specific combine rules added at r210477 to a separate helper function. This should make easier to add more rules for matching AVX/AVX2 horizontal adds/subs. This patch also fixes a problem caused by a wrong check performed on indices of extract_vector_elt dag nodes in input to the scalar adds/subs. New tests have been added to verify that we correctly check indices of extract_vector_elt dag nodes when selecting a horizontal operation. llvm-svn: 210644
* Create macro INITIALIZE_TM_PASS.Jiangning Liu2014-06-113-42/+7
| | | | | | | | Pass initialization requires to initialize TargetMachine for back-end specific passes. This commit creates a new macro INITIALIZE_TM_PASS to simplify this kind of initialization. llvm-svn: 210641
* Global merge for global symbols.Jiangning Liu2014-06-112-10/+72
| | | | | | | | This commit is to improve global merge pass and support global symbol merge. The global symbol merge is not enabled by default. For aarch64, we need some more back-end fix to make it really benifit ADRP CSE. llvm-svn: 210640
* Rename global-merge to enable-global-merge.Jiangning Liu2014-06-111-1/+1
| | | | llvm-svn: 210639
* Convert StringMapEntry::Create to use StringRef instead of start/end ↵Craig Topper2014-06-112-2/+2
| | | | | | pointers. Simpliies all in tree call sites. No functional change. llvm-svn: 210638
* Try to fix the msvc build.Rafael Espindola2014-06-111-1/+2
| | | | llvm-svn: 210636
* Uses generic_category instead of system_category.Rafael Espindola2014-06-112-25/+25
| | | | | | | Some c++ libraries (libstdc++ at least) don't seem to map to the generic category in in the system_category's default_error_condition. llvm-svn: 210635
* MC: add enumeration of WinEH data encodingSaleem Abdulrasool2014-06-111-1/+2
| | | | | | | | | | | | | | | Most Windows platforms use auxiliary data for unwinding. This information is stored in the .pdata section. The encoding format for the data differs between architectures and Windows variants. Windows MIPS and Alpha use identical formats; Alpha64 is the same with different widths. Windows x86_64 and Itanium share the representation. All Windows CE entries are identical irrespective of the architecture. ARMv7 (Windows [NT] on ARM) has its own format. This enumeration will become the differentiator once the windows EH emission infrastructure is generalised, allowing us to emit the necessary unwinding information for Windows on ARM. llvm-svn: 210634
* Remove windows_error.Rafael Espindola2014-06-112-30/+40
| | | | | | | | | | MSVC doesn't seem to provide any is_error_code_enum enumeration for the windows errors. Fortunately very few places in llvm have to handle raw windows errors, so we can just construct the corresponding error_code directly. llvm-svn: 210631
* There is no posix_category in std, use generic_category.Rafael Espindola2014-06-112-12/+3
| | | | llvm-svn: 210630
* Use cast instead of assert + dyn_castMatt Arsenault2014-06-111-3/+2
| | | | llvm-svn: 210628
* R600: Add helper functions.Matt Arsenault2014-06-112-0/+21
| | | | | | | Extract these from some of my other patches, since this is the only thing really making them dependent on each other. llvm-svn: 210627
* CodeGen: refactor DwarfExceptionSaleem Abdulrasool2014-06-118-205/+201
| | | | | | | | | | | | DwarfException served as a base class for exception handling directive emission. However, this is also used by other exception models (e.g. Win64EH). Rename this class to EHStreamer and split it out of DwarfException.h. NFC. Use the opportunity to fix up some of the documentation comments to match current LLVM style. Also rename some functions to conform better with current LLVM coding style. llvm-svn: 210622
* Remove duplicate copy of InstrItineraryData from the TargetMachine,Eric Christopher2014-06-112-13/+8
| | | | | | it's already on the subtarget. llvm-svn: 210619
* Move to a private function to initialize the subtarget dependenciesEric Christopher2014-06-112-11/+20
| | | | | | so that we can use initializer lists for the AArch64 Subtarget. llvm-svn: 210616
* Move to a private function to initialize the subtarget dependenciesEric Christopher2014-06-112-22/+25
| | | | | | so that we can use initializer lists for the X86Subtarget. llvm-svn: 210614
* Sort includes.Eric Christopher2014-06-111-1/+1
| | | | llvm-svn: 210613
* [FastISel][X86] Extend support for {s|u}{add|sub|mul}.with.overflow intrinsics.Juergen Ributzka2014-06-101-30/+89
| | | | llvm-svn: 210610
* Use unique_ptr for X86Subtarget pointer members.Eric Christopher2014-06-102-22/+16
| | | | llvm-svn: 210606
* Move AArch64TargetLowering to AArch64Subtarget.Eric Christopher2014-06-106-9/+13
| | | | | | | This currently necessitates a TargetMachine for the TargetLowering constructor and TLOF. llvm-svn: 210605
* Revert "Remove support for runtime multi-threading."Zachary Turner2014-06-105-15/+46
| | | | | | This reverts revision r210600. llvm-svn: 210603
* Remove support for runtime multi-threading.Zachary Turner2014-06-105-46/+15
| | | | | | | | | | | | | | | | | | | | | This patch removes the functions llvm_start_multithreaded() and llvm_stop_multithreaded(), and changes llvm_is_multithreaded() to return a constant value based on the value of the compile-time definition LLVM_ENABLE_THREADS. Previously, it was possible to have compile-time support for threads on, and runtime support for threads off, in which case certain mutexes were not allocated or ever acquired. Now, if the build is created with threads enabled, mutexes are always acquired. A test before/after patch of compiling a very large TU showed no noticeable performance impact of this change. Reviewers: rnk Differential Revision: http://reviews.llvm.org/D4076 llvm-svn: 210600
* Move AArch64InstrInfo to AArch64Subtarget.Eric Christopher2014-06-104-6/+9
| | | | llvm-svn: 210599
* Remove a method that was just replacing direct access to a member.Eric Christopher2014-06-102-20/+18
| | | | llvm-svn: 210598
* Remove the use of TargetMachine from X86InstrInfo.Eric Christopher2014-06-103-61/+60
| | | | llvm-svn: 210596
* Move X86RegisterInfo away from using the TargetMachine and onlyEric Christopher2014-06-105-33/+30
| | | | | | using the subtarget. llvm-svn: 210595
* Mark a few functions noexcept.Rafael Espindola2014-06-104-7/+7
| | | | | | This reduces the difference between std::error_code and llvm::error_code. llvm-svn: 210591
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