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* Implement irpc. Extracted from a patch by the PaX team. I just added the test.Rafael Espindola2012-06-161-0/+57
| | | | llvm-svn: 158604
* *no need to pollute Intel syntax with bonus mnemonics; operand size is ↵Kay Tiong Khoo2012-06-161-6/+6
| | | | | | explicitly specified llvm-svn: 158603
* Mips/AsmParser/CMakeLists.txt: Fix dependency.NAKAMURA Takumi2012-06-161-2/+1
| | | | llvm-svn: 158602
* It's not deterministic to iterate over SmallPtrSet. Replace it with ↵Evan Cheng2012-06-161-14/+14
| | | | | | SmallSetVector. Patch by Daniel Reynaud. rdar://11671029 llvm-svn: 158594
* Fix crash from r158529 on Bullet.Pete Cooper2012-06-161-1/+10
| | | | | | | | Dynamic GEPs created by SROA needed to insert extra "i32 0" operands to index through structs and arrays to get to the vector being indexed. llvm-svn: 158590
* Don't call 'FilesToRemove[0]' when the vector is empty, even to computeChandler Carruth2012-06-161-1/+1
| | | | | | | the address of it. Found by a checking STL implementation used on a dragonegg builder. Sorry about this one. =/ llvm-svn: 158582
* Harden the Unix signals code to be more async signal safe.Chandler Carruth2012-06-161-9/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is likely only the tip of the ice berg, but this particular bug caused any double-free on a glibc system to turn into a deadlock! It is not generally safe to either allocate or release heap memory from within the signal handler. The 'pop_back()' in RemoveFilesToRemove was deleting memory and causing the deadlock. What's worse, eraseFromDisk in PathV1 has lots of allocation and deallocation paths. We even passed 'true' in a place that would have caused the *signal handler* to try to run the 'system' system call and shell out to 'rm -rf'. That was never going to work... This patch switches the file removal to use a vector of strings so that the exact text needed for the 'unlink' system call can be stored there. It switches the loop to be a boring indexed loop, and directly calls unlink without looking at the error. It also works quite hard to ensure that calling 'c_str()' is safe, by ensuring that the non-signal-handling code path that manipulates the vector always leaves it in a state where every element has already had 'c_str()' called at least once. I dunno exactly how overkill this is, but it fixes the deadlock-on-double free issue, and seems likely to prevent any other issues from sneaking up. Sorry for not having a test case, but I *really* don't know how to test signal handling code easily.... llvm-svn: 158580
* Remove final verification in RABasic.Jakob Stoklund Olesen2012-06-151-20/+0
| | | | | | | We now have a proper machine code verifier pass between register allocation and rewriting. llvm-svn: 158577
* Print out register number in InlineSpiller.Jakob Stoklund Olesen2012-06-151-2/+2
| | | | llvm-svn: 158575
* Accept null PhysReg arguments to checkRegMaskInterference.Jakob Stoklund Olesen2012-06-152-2/+3
| | | | | | | Calling checkRegMaskInterference(VirtReg) checks if VirtReg crosses any regmask operands, regardless of the registers they clobber. llvm-svn: 158563
* Fix the encoding of the armv7m (MClass) for MSR registers other than aspr,Kevin Enderby2012-06-152-21/+31
| | | | | | iaspr, espr and xpsr which also needed to have 0b10 in their mask encoding bits. llvm-svn: 158560
* ARM: optimization for sub+abs.Manman Ren2012-06-151-11/+6
| | | | | | | | | | | | | | This patch will optimize abs(x-y) FROM sub, movs, rsbmi TO subs, rsbmi For abs, we will use cmp instead of movs. This is necessary because we already have an existing peephole pass which optimizes away cmp following sub. rdar: 11633193 llvm-svn: 158551
* *fixed to separate mnemonic from operands with tabKay Tiong Khoo2012-06-151-4/+4
| | | | llvm-svn: 158543
* LSR: fix expansion of scaled reg in non-address type formulae.Andrew Trick2012-06-151-13/+17
| | | | | | | | | For non-address users, Base and Scaled registers are not specially associated to fit an address mode, so SCEVExpander should apply normal expansion rules. Otherwise we may sink computation into inner loops that have already been optimized. llvm-svn: 158537
* LSR fix: "Special" users are just like "Basic" users but allow -1 scale.Andrew Trick2012-06-151-2/+2
| | | | llvm-svn: 158536
* Remove assignments which aren't used afterwards.Bill Wendling2012-06-151-3/+1
| | | | llvm-svn: 158535
* Allow SROA to split up an array of vectors into multiple vectors, even when ↵Pete Cooper2012-06-151-3/+29
| | | | | | the vectors are dynamically indexed llvm-svn: 158529
* Some optimizations done by globalopt are safe only for internal linkage, notRafael Espindola2012-06-151-0/+3
| | | | | | | | linkonce linkage. For example, it is not valid to add unnamed_addr. This also fixes a crash in g++.dg/opt/static5.C. llvm-svn: 158528
* Preserve <undef> flags in ARMExpandPseudo.Jakob Stoklund Olesen2012-06-151-5/+6
| | | | | | This probably mostly shows up in bugpoint-generated code. llvm-svn: 158527
* Use regunit liveness in RegisterCoalescer when it is available.Jakob Stoklund Olesen2012-06-151-13/+21
| | | | | | | We only do very limited physreg coalescing now, but we still merge virtual registers into reserved registers. llvm-svn: 158526
* Factor macro argument parsing into helper methods and add support for .irp.Rafael Espindola2012-06-151-30/+115
| | | | | | | Patch extracted from a larger one by the PaX team. I added the testcases and tightened error handling a bit. llvm-svn: 158523
* Fix issues (infinite loop and/or crash) with self-referential instructions, forDuncan Sands2012-06-151-6/+14
| | | | | | | example degenerate phi nodes and binops that use themselves in unreachable code. Thanks to Charles Davis for the testcase that uncovered this can of worms. llvm-svn: 158508
* Move AVX version of convert instructions that write to GPRs to the Op1 table.Craig Topper2012-06-151-9/+13
| | | | llvm-svn: 158497
* Had a closing brace inside an #ifdef -- oops!Marshall Clow2012-06-151-1/+1
| | | | llvm-svn: 158485
* Adding acessors to COFFObjectFile so that clients can get at the ↵Marshall Clow2012-06-151-0/+31
| | | | | | (non-generic) bits llvm-svn: 158484
* Recommit r158407: Allow SROA to look at a vector type and see if the offset ↵Pete Cooper2012-06-141-2/+15
| | | | | | is out of range to be replaced with a scalar access. Now with additional fix and test for indexing into a vector inside a struct llvm-svn: 158479
* Implement the isSafeToDiscardIfUnused predicate and use it in globalopt andRafael Espindola2012-06-142-4/+4
| | | | | | | globaldce. Globaldce was already removing linkonce globals, but globalopt was not. llvm-svn: 158476
* Move X86::VCVTTSD2SIrr from the 2 operand to 1 operand MemRegOp table.Pete Cooper2012-06-141-1/+1
| | | | | | | Can someone with more knowledge of this please look at other entries to see if others need moved. llvm-svn: 158474
* Fix coding style violations. Remove white spaces and tabs.Akira Hatanaka2012-06-1418-91/+91
| | | | llvm-svn: 158471
* 1. introduce MipsPat in place of Pat in order to exclude those fromAkira Hatanaka2012-06-144-204/+229
| | | | | | | | | being used by Mips16 or Micro Mips 2. clean up a few lines too long encountered Patch by Reed Kotler. llvm-svn: 158470
* Make machine verifier check the first instruction of the last bundle instead ofAkira Hatanaka2012-06-141-8/+8
| | | | | | the last instruction of a basic block. llvm-svn: 158468
* Make comment slightly more helpful.Lang Hames2012-06-141-1/+1
| | | | llvm-svn: 158467
* Revert r158454: Allow SROA to look at a vector type... Its breaking the ↵Pete Cooper2012-06-141-15/+2
| | | | | | | | vectorise buildbot This reverts commit 12c1f86ffa731e2952c80d2cc577000c96b8962c. llvm-svn: 158462
* misched: disable SSA check pending PR13112.Andrew Trick2012-06-141-2/+4
| | | | llvm-svn: 158461
* Recommit r158407: Allow SROA to look at a vector type and see if the offset ↵Pete Cooper2012-06-141-2/+15
| | | | | | is out of range to be replaced with a scalar access. Now with additional fix and test for indexing into a vector inside a struct llvm-svn: 158454
* MipsLongBranch.cpp: Tweak llvm::next() to appease msvc.NAKAMURA Takumi2012-06-141-5/+7
| | | | llvm-svn: 158446
* Replace assertion failure for badly formatted CPS instrution with error message.Richard Barton2012-06-141-1/+2
| | | | llvm-svn: 158445
* Cleanup whitespace.Jush Lu2012-06-141-13/+12
| | | | llvm-svn: 158443
* InstCombine: fix a bug when combining (fcmp cc0 x, y) && (fcmp cc1 x, y).Manman Ren2012-06-141-2/+4
| | | | | | uno && ueq was converted to ueq, it should be converted to uno. llvm-svn: 158441
* Fix Mips/CMakeLists.txt.Akira Hatanaka2012-06-141-0/+1
| | | | llvm-svn: 158437
* Add file MipsLongBranch.cpp.Akira Hatanaka2012-06-141-0/+416
| | | | llvm-svn: 158436
* Remove code in MipsAsmPrinter and MipsMCInstLower.Akira Hatanaka2012-06-143-30/+2
| | | | llvm-svn: 158434
* Add long branch expansion pass for MIPS.Akira Hatanaka2012-06-142-1/+8
| | | | llvm-svn: 158433
* Add AT to the list of registers clobbered by branches so that it is availableAkira Hatanaka2012-06-141-0/+4
| | | | | | as a scratch register when they are expanded to long branches. llvm-svn: 158432
* In MipsRegisterInfo::eliminateFrameIndex, call Mips::loadImmediateAkira Hatanaka2012-06-141-25/+7
| | | | | | to load an immediate that does not fit into 16-bit. llvm-svn: 158431
* In MipsFrameLowering::emitPrologue and emitEpilogue, call Mips::loadImmediateAkira Hatanaka2012-06-141-39/+16
| | | | | | | | to load an immediate that does not fit into 16-bit. Also, take into consideration the global base register slot on the stack when computing the stack size. llvm-svn: 158430
* Define function MipsInstrInfo::GetInstSizeInBytes, which will be called toAkira Hatanaka2012-06-142-6/+76
| | | | | | | compute the size of basic blocks in a function. Also, define a function which emits a series of instructions to load an immediate. llvm-svn: 158429
* In MipsISelDAGToDAG.cpp, store the global base register to a stack frame object.Akira Hatanaka2012-06-141-3/+10
| | | | | | | Long-branches need access to the global base register to get the destination address. llvm-svn: 158428
* Add methods to MipsFunctionInfo for initializing and accessing the stack frameAkira Hatanaka2012-06-141-1/+23
| | | | | | | | | object for the global base register. This is the first of a series of patches which implements long branch expansion for MIPS. llvm-svn: 158427
* Bundle jump/branch instructions with the instructions in the delay slot inAkira Hatanaka2012-06-132-19/+30
| | | | | | | | | delay slot filler pass of MIPS, per suggestion of Jakob Stoklund Olesen. This change, along with the fix in r158154, enables machine verification to be run after delay slot filling. llvm-svn: 158426
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