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* [X86] AVX512: Fix asm syntax for packed vcmpAdam Nemet2014-06-261-3/+3
| | | | | | | | The *_alt defs for vcmp are used by the InstParser (the asm string in the main def is used by the InstPrinter) . The former was accepting vector registers as destination rather than mask registers. llvm-svn: 211750
* Introduce a string_ostream string builder faciltyAlp Toker2014-06-2643-224/+155
| | | | | | | | | | | | | | | | | | | | string_ostream is a safe and efficient string builder that combines opaque stack storage with a built-in ostream interface. small_string_ostream<bytes> additionally permits an explicit stack storage size other than the default 128 bytes to be provided. Beyond that, storage is transferred to the heap. This convenient class can be used in most places an std::string+raw_string_ostream pair or SmallString<>+raw_svector_ostream pair would previously have been used, in order to guarantee consistent access without byte truncation. The patch also converts much of LLVM to use the new facility. These changes include several probable bug fixes for truncated output, a programming error that's no longer possible with the new interface. llvm-svn: 211749
* For CrashRecoveryContext::RunSafelyOnThread, propagate Darwin's ↵Argyrios Kyrtzidis2014-06-251-2/+21
| | | | | | | | | | | | PRIO_DARWIN_BG to the new thread if it is set on the calling thread. This allows libclang's indexing threads to propagate their priority to the clang module building threads. rdar://17459872 llvm-svn: 211747
* [FastISel][X86] More refactoring of select lowering and XALU folding. NFC.Juergen Ributzka2014-06-251-83/+55
| | | | llvm-svn: 211740
* The includes were sorted. Revert r210578.Eric Christopher2014-06-251-1/+1
| | | | llvm-svn: 211737
* [FastISel][X86] Refactor XALU folding. NFC.Juergen Ributzka2014-06-251-124/+70
| | | | llvm-svn: 211735
* [FastISel][X86] Only fold the cmp into the select when both instructions are ↵Juergen Ributzka2014-06-251-5/+15
| | | | | | | | | | | | in the same basic block. If the cmp is in a different basic block, then it is possible that not all operands of that compare have defined registers. This can happen when one of the operands to the cmp is a load and the load gets folded into the cmp. In this case FastISel will skip the load instruction and the vreg is never defined. llvm-svn: 211730
* Merge the used symbol scanning of MCObjectStreamer and RecordStreamer.Rafael Espindola2014-06-254-16/+18
| | | | | | This completes the refactoring of RecordStreamer. llvm-svn: 211727
* Revert "PR20038: DebugInfo: Inlined call sites where the caller has debug ↵David Blaikie2014-06-253-34/+4
| | | | | | | | | | | info but the call itself has no debug location." This reverts commit r211723. Breaks the ASan/compiler-rt build... guess I didn't test very far at all :/. llvm-svn: 211724
* PR20038: DebugInfo: Inlined call sites where the caller has debug info but ↵David Blaikie2014-06-253-4/+34
| | | | | | | | | | | | | | | | | | the call itself has no debug location. This situation does bad things when inlined, so I've fixed Clang not to produce inlinable call sites without locations when the caller has debug info (in the one case where I could find that this occurred). This updates the PR20038 test case to be what clang now produces, and readds the assertion that had to be removed due to this bug. I've also beefed up the debug info verifier to help diagnose these issues in the future, and I hope to add checks to the inliner to just assert-fail if it encounters this situation. If, in the future, we decide we have to cope with this situation, the right thing to do is probably to just remove all the DebugLocs from the inlined instructions. llvm-svn: 211723
* Add Rpass-missed and Rpass-analysis reports to the loop vectorizer. The ↵Tyler Nowicki2014-06-251-24/+183
| | | | | | | | remarks give the vector width of vectorized loops and a brief analysis of loops that fail to be vectorized. For example, an analysis will be generated for loops containing control flow that cannot be simplified to a select. The optimization remarks also give the debug location of expressions that cannot be vectorized, for example the location of an unvectorizable call. Reviewed by: Arnold Schwaighofer llvm-svn: 211721
* [X86] Always prefer to lower a VECTOR_SHUFFLE into a BLENDI instead of SHUFP ↵Andrea Di Biagio2014-06-252-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | (or VPERM2X128). This patch teaches method 'LowerVECTOR_SHUFFLE' to give higher precedence to the check for 'isBlendMask'; the idea is that, when possible, we should firstly check if a shuffle performs a blend, and in case, try to lower it into a BLENDI instead of selecting a SHUFP or (worse) a VPERM2X128. In general: - AVX VBLENDPS/D always have better latency and throughput than VPERM2F128; - BLENDPS/D instructions tend to always have better 'reciprocal throughput' than the equivalent SHUFPS/D; - Both BLENDPS/D and SHUFPS/D are often decoded into the same number of m-ops; however, a m-op obtained from a BLENDPS/D can be scheduled to more than one execution port. This patch: - Moves the check for 'isBlendMask' immediately before the check for 'isSHUFPMask' within method 'LowerVECTOR_SHUFFLE'; - Updates existing tests for sse/avx shuffle/blend instructions to verify that we select (v)blendps/d when possible (instead of (v)shufps/d or vperm2f128). llvm-svn: 211720
* Fix indentation.Juergen Ributzka2014-06-251-7/+7
| | | | llvm-svn: 211717
* Move expression visitation logic up to MCStreamer.Rafael Espindola2014-06-2514-66/+44
| | | | | | Remove the duplicate from MCRecordStreamer. No functionality change. llvm-svn: 211714
* Rename loop unrolling and loop vectorizer metadata to have a common prefix.Eli Bendersky2014-06-255-9/+15
| | | | | | | | | | | | | | | | | | | [LLVM part] These patches rename the loop unrolling and loop vectorizer metadata such that they have a common 'llvm.loop.' prefix. Metadata name changes: llvm.vectorizer.* => llvm.loop.vectorizer.* llvm.loopunroll.* => llvm.loop.unroll.* This was a suggestion from an earlier review (http://reviews.llvm.org/D4090) which added the loop unrolling metadata. Patch by Mark Heffernan. llvm-svn: 211710
* Simplify the visitation of target expressions. No functionality change.Rafael Espindola2014-06-2513-167/+37
| | | | llvm-svn: 211707
* Random Number Generator (llvm)JF Bastien2014-06-253-1/+76
| | | | | | | | | | | | | | | | | | | | | | | | Provides an abstraction for a random number generator (RNG) that produces a stream of pseudo-random numbers. The current implementation uses C++11 facilities and is therefore not cryptographically secure. The RNG is salted with the text of the current command line invocation. In addition, a user may specify a seed (reproducible builds). In clang, the seed can be set via -frandom-seed=X In the back end, the seed can be set via -rng-seed=X This is the llvm part of the patch. clang part: D3391 URL: http://reviews.llvm.org/D3390 Author: yln I'm landing this for the second time, it broke Windows bots the first time around. llvm-svn: 211705
* Simplify AddValueSymbols. No functionality change.Rafael Espindola2014-06-251-4/+3
| | | | llvm-svn: 211701
* [msan] Fix bad interaction between with-calls mode and chained origin tracking.Evgeniy Stepanov2014-06-251-1/+1
| | | | | | | | | | Origin history should only be recorded for uninitialized values, because it is meaningless otherwise. This change moves __msan_chain_origin to the runtime library side and makes it conditional on the corresponding shadow value. Previous code was correct, but _very_ inefficient. llvm-svn: 211700
* Don't leak a file descriptor.Rafael Espindola2014-06-251-1/+1
| | | | llvm-svn: 211699
* Code cleanup.Logan Chien2014-06-251-1/+1
| | | | llvm-svn: 211697
* [x86] Add intrinsics for the pshufd, pshuflw, and pshufhw instructions.Chandler Carruth2014-06-251-0/+12
| | | | llvm-svn: 211694
* Re-apply r211399, "Generate native unwind info on Win64" with a fix to ↵NAKAMURA Takumi2014-06-2512-169/+405
| | | | | | | | | | | | | | | | | | | | | | | ignore SEH pseudo ops in X86 JIT emitter. -- This patch enables LLVM to emit Win64-native unwind info rather than DWARF CFI. It handles all corner cases (I hope), including stack realignment. Because the unwind info is not flexible enough to describe stack frames with a gap of unknown size in the middle, such as the one caused by stack realignment, I modified register spilling code to place all spills into the fixed frame slots, so that they can be accessed relative to the frame pointer. Patch by Vadim Chugunov! Reviewed By: rnk Differential Revision: http://reviews.llvm.org/D4081 llvm-svn: 211691
* Reformat.NAKAMURA Takumi2014-06-253-26/+23
| | | | llvm-svn: 211689
* [X86] Add target combine rule to select ADDSUB instructions from a build_vectorAndrea Di Biagio2014-06-252-1/+138
| | | | | | | | | | | | | | | | | This patch teaches the backend how to combine a build_vector that implements an 'addsub' between packed float vectors into a sequence of vector add and vector sub followed by a VSELECT. The new VSELECT is expected to be lowered into a BLENDI. At ISel stage, the sequence 'vector add + vector sub + BLENDI' is pattern-matched against ISel patterns added at r211427 to select 'addsub' instructions. Added three more ISel patterns for ADDSUB. Added test sse3-avx-addsub-2.ll to verify that we correctly emit 'addsub' instructions. llvm-svn: 211679
* Factor out part of LICM::sink into a helper function.Evgeniy Stepanov2014-06-251-28/+41
| | | | llvm-svn: 211678
* [LICM] Don't create more than one copy of an instruction per loop exit block ↵Evgeniy Stepanov2014-06-251-24/+34
| | | | | | | | | | | | | | | | | | | | when sinking. Fixes exponential compilation complexity in PR19835, caused by LICM::sink not handling the following pattern well: f = op g e = op f, g d = op e c = op d, e b = op c a = op b, c When an instruction with N uses is sunk, each of its operands gets N new uses (all of them - phi nodes). In the example above, if a had 1 use, c would have 2, e would have 4, and g would have 8. llvm-svn: 211673
* Fix another asserting method in the null streamer.Rafael Espindola2014-06-251-1/+0
| | | | llvm-svn: 211668
* Fix a regression from r211653.Rafael Espindola2014-06-251-1/+0
| | | | | | | The method was empty in the null streamer but I mistakenly replaced it with the aborting one in MCStreamer. llvm-svn: 211666
* MCNullStreamer.cpp: Roll back a few empty methods that have been marked as ↵NAKAMURA Takumi2014-06-251-1/+2
| | | | | | | | | | | unreachable in MCStreamer.cpp. void EmitCOFFSecRel32(MCSymbol const *Symbol) override {} void EmitGPRel32Value(const MCExpr *Value) override {} It should fix crash like "llc -mtriple=i686-cygwin -filetype=null". llvm-svn: 211664
* Use SourceMgr::getMemoryBuffer() in a couple of placesAlp Toker2014-06-251-2/+2
| | | | | | Cleanup only. llvm-svn: 211656
* Move some trivial methods up to MCStreamer.Rafael Espindola2014-06-253-80/+33
| | | | | | This saves some duplicated boilerplate in RecordStreamer and NullStreamer. llvm-svn: 211653
* [RuntimeDyld] Adds the necessary hooks to MCJIT to be able to debug generatedLang Hames2014-06-253-10/+129
| | | | | | | | MachO files using the GDB JIT debugging interface. Patch by Keno Fischer. Thanks Keno! llvm-svn: 211652
* Simplify the handling of .cfi_endproc.Rafael Espindola2014-06-255-24/+9
| | | | | | No functionality change. llvm-svn: 211651
* Simplify EmitLabel.Rafael Espindola2014-06-242-6/+1
| | | | | | | All the "real" streamers were already calling to MCStreamer::EmitLabel to do part of the work. llvm-svn: 211646
* [FastISel][X86] Fold XALU condition into branch and compare.Juergen Ributzka2014-06-241-0/+150
| | | | | | | Optimize the codegen of select and branch instructions to directly use the EFLAGS from the {s|u}{add|sub|mul}.with.overflow intrinsics. llvm-svn: 211645
* R600/SI: Use a ComplexPattern for MUBUF storesTom Stellard2014-06-243-36/+67
| | | | | | | | Now that non-leaf ComplexPatterns are allowed we can fold all the MUBUF store patterns into the instruction definition. We will also be able to reuse this new ComplexPattern for MUBUF loads and atomic operations. llvm-svn: 211644
* R600: Promote i64 stores to v2i32Tom Stellard2014-06-243-3/+10
| | | | | | Now we need only one 64-bit pattern for stores. llvm-svn: 211643
* Print a=b as an assignment.Rafael Espindola2014-06-2411-42/+13
| | | | | | | | | | | In assembly the expression a=b is parsed as an assignment, so it should be printed as one. This remove a truly horrible hack for producing a label with "a=.". It would be used by codegen but would never be reached by the asm parser. Sorry I missed this when it was first committed. llvm-svn: 211639
* R600: Fix inconsistency in rsq instructions.Matt Arsenault2014-06-248-14/+55
| | | | | | | | | | | | | R600 was using a clamped version of rsq, but SI was not. Add a new rsq_clamped intrinsic and use them consistently. It's unclear to me from the documentation what behavior the R600 instructions have, so I assume they have the legacy behavior described by the SI documents. For R600, use RECIPSQRT_IEEE for both llvm.AMDGPU.rsq.legacy and llvm.AMDGPU.rsq. R600 also has RECIPSQRT_FF, which I'm not sure how it fits in here. llvm-svn: 211637
* fixed a few typos in commentsSanjay Patel2014-06-242-14/+12
| | | | llvm-svn: 211634
* [PPC64] Fix PR20071 (fctiduz generated for targets lacking that instruction)Bill Schmidt2014-06-241-0/+4
| | | | | | | | | | | | | | | | | PR20071 identifies a problem in PowerPC's fast-isel implementation for floating-point conversion to integer. The fctiduz instruction was added in Power ISA 2.06 (i.e., Power7 and later). However, this instruction is being generated regardless of which 64-bit PowerPC target is selected. The intent is for fast-isel to punt to DAG selection when this instruction is not available. This patch implements that change. For testing purposes, the existing fast-isel-conversion.ll test adds a RUN line for -mcpu=970 and tests for the expected code generation. Additionally, the existing test fast-isel-conversion-p5.ll was found to be incorrectly expecting the unavailable instruction to be generated. I've removed these test variants since we have adequate coverage in fast-isel-conversion.ll. llvm-svn: 211627
* vpblend intrinsics combines as shifts intrinsics due to absence return stmt ↵Robert Khasanov2014-06-241-0/+2
| | | | | | | | | | between them Fix PR20088 Differential Revision: http://reviews.llvm.org/D4277 llvm-svn: 211617
* R600: Remove DIV_INFMatt Arsenault2014-06-242-3/+2
| | | | | | | This corresponded to an amdil instruction which there is a 2 instruction equivalent for. llvm-svn: 211616
* R600/SI: Move pattern to instruction definitionMatt Arsenault2014-06-241-6/+1
| | | | llvm-svn: 211614
* Add new debug kind LocTrackingOnly.Diego Novillo2014-06-241-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This new debug emission kind supports emitting line location information in all instructions, but stops code generation from emitting debug info to the final output. This mode is useful when the backend wants to track source locations during code generation, but it does not want to produce debug info. This is currently used by optimization remarks (-pass-remarks, -pass-remarks-missed and -pass-remarks-analysis). To prevent debug info emission, DIBuilder never inserts the annotation 'llvm.dbg.cu' when LocTrackingOnly is enabled. Reviewers: echristo, dblaikie Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D4234 llvm-svn: 211609
* Resubmit commit r211533Weiming Zhao2014-06-243-1/+95
| | | | | | | "Fix PR20056: Implement pseudo LDR <reg>, =<literal/label> for AArch64" Missed files are added in this commit. llvm-svn: 211605
* CodeGen: Avoid multiple strlen callsDavid Majnemer2014-06-241-5/+4
| | | | | | | Use a StringRef to hold our section prefix. This avoids multiple calls to strlen. llvm-svn: 211602
* ARM: Fix TPsoft for Thumb modeChristian Pirker2014-06-242-5/+13
| | | | | | Reviewed at http://reviews.llvm.org/D4230 llvm-svn: 211601
* Replace two release calls with std::move. I missed this on the previous commit.Rafael Espindola2014-06-241-2/+2
| | | | llvm-svn: 211597
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