summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
* Refactor the disabling of Thumb-1 LDM/STM generationJames Molloy2014-06-162-7/+7
| | | | | | | | Originally I switched the LD/ST optimizer off in TargetMachine as it was previously, but Eric has suggested he'd prefer that it be short-circuited in the pass itself. No functionality change. llvm-svn: 211037
* Fix pr17056.Rafael Espindola2014-06-161-5/+5
| | | | | | | | | | | | | This makes llvm-nm ignore members that are not sufficiently aligned for lib/Object to handle. These archives are invalid. GNU AR is able to handle this, but in general just warns about broken archive members. We should probably start warning too, but for now just make sure llvm-nm exits with an 0. llvm-svn: 211036
* Convert the Archive API to use ErrorOr.Rafael Espindola2014-06-162-57/+48
| | | | | | | | | Now that we have c++11, even things like ErrorOr<std::unique_ptr<...>> are easy to use. No intended functionality change. llvm-svn: 211033
* [AArch64] Remove dead code.Tilmann Scheller2014-06-161-3/+0
| | | | | | Both function declarations lack a callee and an implementation. llvm-svn: 211029
* Hook up vector int_ctlz for AVX512.Cameron McInally2014-06-162-0/+14
| | | | llvm-svn: 211024
* [mips][mips64r6] ssnop is deprecated on MIPS32r6/MIPS64r6Daniel Sanders2014-06-162-1/+14
| | | | | | | | | | | | Summary: Depends on D4120 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: zoran.jovanovic, vmedic Differential Revision: http://reviews.llvm.org/D4121 llvm-svn: 211021
* [mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6Daniel Sanders2014-06-166-6/+61
| | | | | | | | | | | | | | | | | Summary: There is no change to the restrictions, just the result register is stored once in the encoding rather than twice. The rt field is zero in MIPS32r6/MIPS64r6. Depends on D4119 Reviewers: zoran.jovanovic, jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4120 llvm-svn: 211019
* [mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6.Daniel Sanders2014-06-1610-35/+142
| | | | | | | | | | | | | | | | | | | | | Summary: The linked-load, store-conditional operations have been re-encoded such that have a 9-bit offset instead of the 16-bit offset they have prior to MIPS32r6/MIPS64r6. While implementing this, I noticed that the atomic load/store pseudos always emit a sign extension using sll and sra. I have improved this to use seb/seh when they are available (MIPS32r2/MIPS64r2 and above). Depends on D4118 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4119 llvm-svn: 211018
* Support/ConvertUTF: restore compatibility with MSVC, which only implements C89Dmitri Gribenko2014-06-161-5/+7
| | | | llvm-svn: 211016
* Support/ConvertUTF: implement U+FFFD insertion according to the recommendationDmitri Gribenko2014-06-161-8/+143
| | | | | | | | | given in the Unicode spec That is, replace every maximal subpart of an ill-formed subsequence with one U+FFFD. llvm-svn: 211015
* [AArch64] Fix a fencepost error in lowering for llvm.aarch64.neon.uqshl.James Molloy2014-06-161-1/+1
| | | | | | Patch by Jiangning Liu! llvm-svn: 211014
* [mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates ↵Daniel Sanders2014-06-165-9/+88
| | | | | | | | | | | | | | | | | | | | | rather than 16-bit in MIPS32r6/MIPS64r6 Summary: The error message for the invalid.s cases isn't very helpful. It happens because there is an instruction with a wider immediate that would have matched if the NotMips32r6 predicate were true. I have some WIP to improve the message but it affects most error messages for removed/re-encoded instructions on MIPS32r6/MIPS64r6 and should therefore be a separate commit. Depens on D4115 Reviewers: zoran.jovanovic, jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4117 llvm-svn: 211012
* ARMEB: Fix trunc store for vector typesChristian Pirker2014-06-161-1/+2
| | | | | | Reviewed at http://reviews.llvm.org/D4135 llvm-svn: 211010
* Canonicalize addrspacecast ConstExpr between different pointer typesJingyue Wu2014-06-153-3/+21
| | | | | | | | | | | | | | | | | | As a follow-up to r210375 which canonicalizes addrspacecast instructions, this patch canonicalizes addrspacecast constant expressions. Given clang uses ConstantExpr::getAddrSpaceCast to emit addrspacecast cosntant expressions, this patch is also a step towards having the frontend emit canonicalized addrspacecasts. Piggyback a minor refactor in InstCombineCasts.cpp Update three affected tests in addrspacecast-alias.ll, access-non-generic.ll and constant-fold-gep.ll and added one new test in constant-fold-address-space-pointer.ll llvm-svn: 211004
* Fix copy paste errorMatt Arsenault2014-06-151-1/+1
| | | | llvm-svn: 211003
* R600: Remove a few more things from AMDILISelLoweringMatt Arsenault2014-06-152-27/+21
| | | | | | | Try to keep all the setOperationActions for integer ops together. llvm-svn: 211001
* R600: Fix assert on vector sdivMatt Arsenault2014-06-151-4/+4
| | | | llvm-svn: 211000
* R600: Move / cleanup more leftover AMDIL stuff.Matt Arsenault2014-06-153-71/+30
| | | | llvm-svn: 210998
* R600: Move division custom lowering out of AMDILISelLoweringMatt Arsenault2014-06-153-271/+257
| | | | llvm-svn: 210997
* Temporarily revert r210953 in an attempt to bring the ARM buildbotsEric Christopher2014-06-159-26/+24
| | | | | | back. llvm-svn: 210996
* R600: Report that integer division is expensive.Matt Arsenault2014-06-151-0/+7
| | | | | | Divides by weird constants now emit much better code. llvm-svn: 210995
* R600: Remove dead codeMatt Arsenault2014-06-152-75/+11
| | | | llvm-svn: 210994
* PR20038: DebugInfo missing DIEs for some concrete variables.David Blaikie2014-06-151-0/+3
| | | | | | | | I haven't nailed this down entirely, but this is about as small of a test case as I can seem to construct and adequately demonstrates the crasher. I'll continue investigating the root cause/fix(es). llvm-svn: 210993
* LegalizeDAG: make sure cast is unsigned before using FP_TO_UINT.Tim Northover2014-06-151-1/+4
| | | | | | | | | | | | It's valid to use FP_TO_SINT when asking for a smaller type (e.g. all "unsigned int16" values fit into a "signed int32"), but the reverse isn't true. Unfortunately, I'm not actually aware of any architecture with asymmetric FP_TO_SINT and FP_TO_UINT handling and the logic happens to work in the symmetric case, so I can't actually write a test for this. llvm-svn: 210986
* AArch64: improve handling & modelling of FP_TO_XINT nodes.Tim Northover2014-06-152-10/+25
| | | | | | | | There's probably no acatual change in behaviour here, just updating the LowerFP_TO_INT function to be more similar to the reverse implementation and updating costs to current CodeGen. llvm-svn: 210985
* AArch64: improve vector [su]itofp handling.Tim Northover2014-06-152-36/+46
| | | | | | | This somehow got missed in the AArch64 merge, so should fix a performance regression since 3.4. llvm-svn: 210984
* Replacing the private implementations of SwapValue with calls to ↵Artyom Skrobov2014-06-142-130/+120
| | | | | | sys::swapByteOrder() llvm-svn: 210980
* Using llvm::sys::swapByteOrder() for the common case of byte-swapping a ↵Artyom Skrobov2014-06-143-5/+5
| | | | | | value in place llvm-svn: 210978
* Renaming SwapByteOrder() to getSwappedBytes()Artyom Skrobov2014-06-146-8/+8
| | | | | | The next commit will add swapByteOrder(), acting in-place llvm-svn: 210973
* Fix typoMatt Arsenault2014-06-141-1/+1
| | | | llvm-svn: 210968
* R600: Fix asserts related to constant initializersMatt Arsenault2014-06-141-5/+20
| | | | | | | | | | | This would assert if a constant address space was extern and therefore didn't have an initializer. If the initializer was undef, it would hit the unreachable unhandled initializer case. An extern global should never really occur since we don't have machine linking, but bugpoint likes to remove initializers. llvm-svn: 210967
* R600: Use address space enum instead of valueMatt Arsenault2014-06-141-6/+7
| | | | llvm-svn: 210966
* Remove extra whitespace in function declaration. No functionality change.Nick Lewycky2014-06-141-2/+2
| | | | llvm-svn: 210965
* DebugInfo: Remove some extra handling of abstract variables and instead rely ↵David Blaikie2014-06-132-40/+34
| | | | | | | | | | | | | | | solely on the delayed handling introduced in r210946 Now that we handle finding abstract variables at the end of the module, remove the upfront handling and just ensure the abstract variable is built when necessary. In theory we could have a split implementation, where inlined variables are immediately constructed referencing the abstract definition, and concrete variables are delayed - but let's go with one solution for now unless there's a reason not to. llvm-svn: 210961
* Remove InstrItineraryData off of the TargetMachine - it's alreadyEric Christopher2014-06-132-6/+2
| | | | | | on the subtarget and just forward the accessor. llvm-svn: 210955
* Move ARMJITInfo off of the TargetMachine and down onto the subtarget.Eric Christopher2014-06-139-21/+25
| | | | | | This required untangling a mess of headers that included around. llvm-svn: 210953
* Move GlobalMerge from Transform to CodeGen.Jiangning Liu2014-06-134-2/+2
| | | | | | | | | | This patch is to move GlobalMerge pass from Transform/Scalar to CodeGen, because GlobalMerge depends on TargetMachine. In the mean time, the macro INITIALIZE_TM_PASS is also moved to CodeGen/Passes.h. With this fix we can avoid making libScalarOpts depend on libCodeGen. llvm-svn: 210951
* The hazard recognizer only needs a subtarget, not a target machineEric Christopher2014-06-137-16/+21
| | | | | | so make it take one. Fix up all users accordingly. llvm-svn: 210948
* Fix typo.Eric Christopher2014-06-131-1/+1
| | | | llvm-svn: 210947
* DebugInfo: Reference abstract definitions from variables in concrete ↵David Blaikie2014-06-132-1/+7
| | | | | | | | | | | | definitions that preceed their first inline definition. Rather than relying on abstract variables looked up at the time the concrete variable is created, look them up at the end of the module to ensure they're referenced even if they're created after the concrete definition. This completes/matches the work done in r209677 to handle this for the subprograms themselves. llvm-svn: 210946
* [DWARF parser] Use distinction between DW_AT_ranges_base and ↵Alexey Samsonov2014-06-133-8/+17
| | | | | | DW_AT_GNU_ranges_base instead of DWARF version llvm-svn: 210945
* DwarfDebug::getExistingAbstractVariable: constify an existing reference ↵David Blaikie2014-06-132-2/+2
| | | | | | parameter that didn't need to be mutated. llvm-svn: 210944
* DebugInfo: Following up to r209677, refactor local variable emission to ↵David Blaikie2014-06-134-25/+48
| | | | | | | | | | | | | | | | delay the choice between emitting the definition attributes or using DW_AT_abstract_definition This doesn't fix the abstract variable handling yet, but it introduces a similar delay mechanism as was added for subprograms, causing DW_AT_location to be reordered to the beginning of the attribute list for local variables, and fixes all the test fallout for that. A subsequent commit will remove the abstract variable handling in DbgVariable and just do the abstract variable lookup at module end to ensure that abstract variables introduced after their concrete counterparts are appropriately referenced by the concrete variable. llvm-svn: 210943
* Make the error-handling functions thread-safe.Zachary Turner2014-06-131-4/+19
| | | | | | | | | | | | | Prior to this change, error handling functions must be installed and removed only inside of an llvm_[start/stop]_multithreading pair. This change allows error handling functions to be installed any time, and from any thread. Reviewed by: chandlerc Differential Revision: http://reviews.llvm.org/D4140 llvm-svn: 210937
* Remove top-level Clang -fsanitize= flags for optional ASan features.Alexey Samsonov2014-06-131-33/+15
| | | | | | | | | | | | | Init-order and use-after-return modes can currently be enabled by runtime flags. use-after-scope mode is not really working at the moment. The only problem I see is that users won't be able to disable extra instrumentation for init-order and use-after-scope by a top-level Clang flag. But this instrumentation was implicitly enabled for quite a while and we didn't hear from users hurt by it. llvm-svn: 210924
* X86: lower ATOMIC_CMP_SWAP_WITH_SUCCESS directlyTim Northover2014-06-131-12/+31
| | | | | | | | | | | Lowering this new node allows us to fold the almost universal comparison for success before it's even formed. Instead we can create a copy from EFLAGS and an X86ISD::SETCC operation since all "cmpxchg" instructions set the zero-flag to the correct value. rdar://problem/13201607 llvm-svn: 210923
* R600: Cleanup some old AMDIL stuff.Matt Arsenault2014-06-132-95/+42
| | | | | | | | | | | | Move / delete some of the more obviously wrong setOperationAction calls. Most of these are setting Expand for types that aren't legal which is the default anyway. Leave stuff that might require more thought on whether it's junk or not as it is. No functionality change. llvm-svn: 210922
* Finishing touch for the std::error_code transition.Rafael Espindola2014-06-138-25/+30
| | | | | | | | | | | While std::error_code itself seems to work OK in all platforms, there are few annoying differences with regards to the std::errc enumeration. This patch adds a simple llvm enumeration, which will hopefully avoid build breakages in other platforms and surprises as we get more uses of std::error_code. llvm-svn: 210920
* Atomics: make use of the "cmpxchg weak" instruction.Tim Northover2014-06-131-12/+22
| | | | | | | | | This also simplifies the IR we create slightly: instead of working out where success & failure should go manually, it turns out we can just always jump to a success/failure block created for the purpose. Later phases will sort out the mess without much difficulty. llvm-svn: 210917
* Atomics: switch direction of cmpxchg comparisonTim Northover2014-06-131-2/+2
| | | | | | | | This has two benefits: it makes the result more suitable for direct insertaion into the struct to emulate the new cmpxchg, and it means the name we give the instruction matches its actual effect better. llvm-svn: 210916
OpenPOWER on IntegriCloud