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* Refactor: Simplify boolean conditional return statements in lib/CodeGen.Rafael Espindola2015-10-249-60/+24
| | | | | | Patch by Richard. llvm-svn: 251213
* [X86][SSE] Use lowerVectorShuffleWithUNPCK instead of custom matches.Simon Pilgrim2015-10-241-104/+40
| | | | | | Most 128-bit and 256-bit shuffles were manually matching UNPCK patterns - use lowerVectorShuffleWithUNPCK to be more thorough. llvm-svn: 251211
* [X86][SSE] lowerVectorShuffleWithUNPCK - use equivalent shuffle mask test.Simon Pilgrim2015-10-241-25/+14
| | | | | | Use isShuffleEquivalent to match UNPCK shuffles - better support for build vector inputs. llvm-svn: 251207
* Refactor: Simplify boolean conditional return statements in ↵Michael Zolotukhin2015-10-242-11/+5
| | | | | | | | | | | | lib/Transforms/Vectorize (NFC). Summary: Use clang-tidy to simplify boolean conditional return statements Differential Revision: http://reviews.llvm.org/D10003 Patch by Richard<legalize@xmission.com> llvm-svn: 251206
* [DAGCombiner] Tidy up ConstantFP commutation. NFCISimon Pilgrim2015-10-241-37/+21
| | | | | | Move ConstantFP canonicalization of commutative instructions to start of 2-op node creation (matches integer) - simplifies constant folding code. llvm-svn: 251203
* Use all_of to simplify control flow. NFC.Benjamin Kramer2015-10-242-16/+4
| | | | llvm-svn: 251202
* Add libuuid to required system libraries list for mingw.Yaron Keren2015-10-241-1/+2
| | | | | | | | | This list is produced by llvm-config --system-libs to be used by external programs using the llvm libraries, such as creduce. In r250501 llvm/Support/Windows/Path.inc started to use the constant FOLDERID_Profile from libuuid. llvm-svn: 251201
* Use find_if to simplify control flow. NFC.Benjamin Kramer2015-10-241-10/+5
| | | | llvm-svn: 251200
* [DAGCombiner] Generalize masking of constant rotates.Simon Pilgrim2015-10-241-5/+10
| | | | | | | | We don't need a mask of a rotation result to be a constant splat - any constant scalar/vector can be usefully folded. Followup to D13851. llvm-svn: 251197
* Call the version of ConvertCostTableLookup that takes a statically sized ↵Craig Topper2015-10-241-3/+2
| | | | | | array rather than pointer and size. NFC llvm-svn: 251196
* X86ISelLowering: Support tail calls to/from callee pop functionsHans Wennborg2015-10-241-22/+33
| | | | | | | | | This enables tail calls with thiscall, stdcall, vectorcall and fastcall functions. Differential Revision: http://reviews.llvm.org/D13999 llvm-svn: 251190
* Fix unused variable warning. NFC.Simon Pilgrim2015-10-241-2/+1
| | | | llvm-svn: 251189
* [X86][XOP] Add support for lowering vector rotationsSimon Pilgrim2015-10-242-55/+102
| | | | | | | | | | This patch adds support for lowering to the XOP VPROT / VPROTI vector bit rotation instructions. This has required changes to the DAGCombiner rotation pattern matching to support vector types - so far I've only changed it to support splat vectors, but generalising this further is feasible in the future. Differential Revision: http://reviews.llvm.org/D13851 llvm-svn: 251188
* [TblGen] ArrayRefize TGParser. No functional change intended.Benjamin Kramer2015-10-243-28/+20
| | | | llvm-svn: 251186
* [BasicAliasAnalysis] Simplify expression, no functional change.Benjamin Kramer2015-10-241-3/+2
| | | | | | (-1) - x + 1 is the same as -x. llvm-svn: 251185
* ScalarReplAggregates.cpp: Try to appease clash of anonymous::SROA in modules ↵NAKAMURA Takumi2015-10-241-0/+1
| | | | | | build. llvm-svn: 251181
* Extract out getConstantRangeFromMetadata; NFCSanjoy Das2015-10-243-51/+30
| | | | | | | | | | | | The loop idiom creating a ConstantRange is repeated twice in the codebase, time to give it a name and a home. The loop is also repeated in `rangeMetadataExcludesValue`, but using `getConstantRangeFromMetadata` there would not be an NFC -- the range returned by `getConstantRangeFromMetadata` may contain a value that none of the subranges did. llvm-svn: 251180
* Fix whitespace issues in two places; NFCSanjoy Das2015-10-242-3/+4
| | | | llvm-svn: 251179
* [libFuzzer] add -merge flag to merge corporaKostya Serebryany2015-10-245-0/+72
| | | | llvm-svn: 251168
* AMDGPU: Print modifiers when dumping AMDGPUOperandMatt Arsenault2015-10-241-1/+1
| | | | llvm-svn: 251160
* [RS4GC] Rename stripDereferenceabilityInfo into stripNonValidAttributes.Igor Laevsky2015-10-231-18/+18
| | | | llvm-svn: 251157
* Add a RAW mode to StringTableBuilder.Rafael Espindola2015-10-234-10/+21
| | | | | | | | | | | | In this mode it just tries to tail merge the strings without imposing any other format constrains. It will not, for example, add a null byte between them. Also add support for keeping a tentative size and offset if we decide to not optimize after all. This will be used shortly in lld for merging SHF_STRINGS sections. llvm-svn: 251153
* Revert rL251061 [SimplifyCFG] Extend SimplifyResume to handle phi of trivial ↵Chen Li2015-10-231-65/+11
| | | | | | landing pad. llvm-svn: 251149
* Handle non-constant shifts in computeKnownBits, and use computeKnownBits for ↵Hal Finkel2015-10-233-34/+143
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | constant folding in InstCombine/Simplify First, the motivation: LLVM currently does not realize that: ((2072 >> (L == 0)) >> 7) & 1 == 0 where L is some arbitrary value. Whether you right-shift 2072 by 7 or by 8, the lowest-order bit is always zero. There are obviously several ways to go about fixing this, but the generic solution pursued in this patch is to teach computeKnownBits something about shifts by a non-constant amount. Previously, we would give up completely on these. Instead, in cases where we know something about the low-order bits of the shift-amount operand, we can combine (and together) the associated restrictions for all shift amounts consistent with that knowledge. As a further generalization, I refactored all of the logic for all three kinds of shifts to have this capability. This works well in the above case, for example, because the dynamic shift amount can only be 0 or 1, and thus we can say a lot about the known bits of the result. This brings us to the second part of this change: Even when we know all of the bits of a value via computeKnownBits, nothing used to constant-fold the result. This introduces the necessary code into InstCombine and InstSimplify. I've added it into both because: 1. InstCombine won't automatically pick up the associated logic in InstSimplify (InstCombine uses InstSimplify, but not via the API that passes in the original instruction). 2. Putting the logic in InstCombine allows the resulting simplifications to become part of the iterative worklist 3. Putting the logic in InstSimplify allows the resulting simplifications to be used by everywhere else that calls SimplifyInstruction (inlining, unrolling, and many others). And this requires a small change to our definition of an ephemeral value so that we don't break the rest case from r246696 (where the icmp feeding the @llvm.assume, is also feeding a br). Under the old definition, the icmp would not be considered ephemeral (because it is used by the br), but this causes the assume to remove itself (in addition to simplifying the branch structure), and it seems more-useful to prevent that from happening. llvm-svn: 251146
* GVN: don't try to replace instruction with itself.Tim Northover2015-10-231-5/+9
| | | | | | | | | | | After some look-ahead PRE was added for GEPs, an instruction could end up in the table of candidates before it was actually inspected. When this happened the pass might decide it was the best candidate to replace itself. This didn't go well. Should fix PR25291 llvm-svn: 251145
* Fix the variable names to match the LLVM style.Rafael Espindola2015-10-231-27/+27
| | | | llvm-svn: 251143
* [SCEV] Fix stylistic issue in MatchBinaryAddToConst; NFCISanjoy Das2015-10-231-1/+1
| | | | | | | | | | Instead of checking `(FlagsPresent & ExpectedFlags) != 0`, check `(FlagsPresent & ExpectedFlags) == ExpectedFlags`. Right now they're equivalent since `ExpectedFlags` can only be either `FlagNUW` or `FlagNSW`, but if we ever pass in `ExpectedFlags` as `FlagNUW | FlagNSW` then checking `(FlagsPresent & ExpectedFlags) != 0` would be wrong. llvm-svn: 251142
* [Inliner] Don't inline through callsites with operand bundlesSanjoy Das2015-10-231-0/+4
| | | | | | | | | | | | | | | | Summary: This change teaches the LLVM inliner to not inline through callsites with unknown operand bundles. Currently all operand bundles are "unknown" operand bundles but in the near future we will add support for inlining through some select kinds of operand bundles. Reviewers: reames, chandlerc, majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14001 llvm-svn: 251141
* [X86] Clean up the tail call eligibility logicReid Kleckner2015-10-231-32/+38
| | | | | | | | | | | | | | | | | | | Summary: The logic here isn't straightforward because our support for TargetOptions::GuaranteedTailCallOpt. Also fix a bug where we were allowing tail calls to cdecl functions from fastcall and vectorcall functions. We were special casing thiscall and stdcall callers rather than checking for any convention that requires clearing stack arguments before returning. Reviewers: hans Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14024 llvm-svn: 251137
* [RuntimeDyld][COFF] Fix a think-o in the handling of the IMAGE_REL_AMD64_ADDR64Lang Hames2015-10-231-1/+1
| | | | | | relocation that was introduced in r250733. llvm-svn: 251135
* [libFuzzer] remove some old code; also make ↵Kostya Serebryany2015-10-234-13/+4
| | | | | | __sanitizer_get_total_unique_caller_callee_pairs weak so that newer libFuzzer works with older asan llvm-svn: 251133
* AMDGPU: Fix parsing of 32-bit literals with sign bit setMatt Arsenault2015-10-232-5/+8
| | | | llvm-svn: 251132
* [ARM] Renaming +t2dsp feature into +dsp, as discussed on llvm-devArtyom Skrobov2015-10-233-9/+9
| | | | llvm-svn: 251125
* [ARM CodeGen] @llvm.debugtrap call may be removed when restoring callee ↵Oleg Ranevskyy2015-10-231-1/+5
| | | | | | | | | | | | | | | | | saved registers Summary: When ARMFrameLowering::emitPopInst generates a "pop" instruction to restore the callee saved registers, it checks if the LR register is among them. If so, the function may decide to remove the basic block's terminator and replace it with a "pop" to the PC register instead of LR. This leads to a problem when the block's terminator is preceded by a "llvm.debugtrap" call. The MI iterator points to the trap in such a case, which is also a terminator. If the function decides to restore LR to PC, it erroneously removes the trap. Reviewers: asl, rengolin Subscribers: aemerson, jfb, rengolin, dschuff, llvm-commits Differential Revision: http://reviews.llvm.org/D13672 llvm-svn: 251123
* Test commit: fix typo in comment.Oleg Ranevskyy2015-10-231-1/+1
| | | | llvm-svn: 251122
* [CodeGen] Mark setjmp/catchret MBBs address-takenJoseph Tremoulet2015-10-235-9/+15
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This ensures that BranchFolding (and similar) won't remove these blocks. Also allow AsmPrinter::EmitBasicBlockStart to process MBBs which are address-taken but do not have BBs that are address-taken, since otherwise its call to getAddrLabelSymbolTableToEmit would fail an assertion on such blocks. I audited the other callers of getAddrLabelSymbolTableToEmit (and getAddrLabelSymbol); they all have BBs known to be address-taken except for the call through getAddrLabelSymbol from WinException::create32bitRef; that call is actually now unreachable, so I've removed it and updated the signature of create32bitRef. This fixes PR25168. Reviewers: majnemer, andrew.w.kaylor, rnk Subscribers: pgavlin, llvm-commits Differential Revision: http://reviews.llvm.org/D13774 llvm-svn: 251113
* [BasicAA] Bugfix for r251016James Molloy2015-10-231-2/+8
| | | | | | | | If the loaded type sizes don't match the element type of the sequential type, all bets are off and the addresses may, indeed, overlap. Surprisingly, this just got caught in one test, on one builder, out of the 30+ builders testing this change. Congratulations go to http://lab.llvm.org:8011/builders/clang-aarch64-lnt/builds/5205. llvm-svn: 251112
* Revert "[AArch64]Merge halfword loads into a 32-bit load"James Molloy2015-10-231-215/+45
| | | | | | This reverts commit r250719. This introduced a codegen fault in SPEC2000.gcc, when compiled for Cortex-A53. llvm-svn: 251108
* [SCEV] Get rid of an unnecessary lambda; NFCSanjoy Das2015-10-231-11/+9
| | | | llvm-svn: 251099
* [mips][microMIPS] Implement SHLL.PH, SHLL_S.PH, SHLL.QB, SHLLV.PH, ↵Zlatko Buljan2015-10-233-32/+126
| | | | | | | | SHLLV_S.PH, SHLLV.QB, SHLLV_S.W, SHLL_S.W, SHRA.QB and SHRA_R.QB instructions Differential Revision: http://reviews.llvm.org/D13929 llvm-svn: 251098
* [SCEV] Fix a latent bug in `getPreStartForExtend`Sanjoy Das2015-10-231-1/+3
| | | | | | | | | | | | | | | | | | I could not come up a way to test this -- I think this bug is latent today, and will not actually result in a miscompile. In `getPreStartForExtend`, SCEV constructs `PreStart` as a sum of all of `SA`'s operands except `Op`. It also uses `SA`'s no-wrap flags, and this is problematic because removing an element from an add expression can make it signed-wrap. E.g. if `SA` was `(127 + 1 + -1)`, then it could safely be `<nsw>` (since `sext(127) + sext(1) + sext(-1)` == `sext(127 + 1 + -1)`), but `(127 + 1)` (== `PreStart` if `Op` is `-1`) is not `<nsw>`. Transferring `<nuw>` from `SA` to `PreStart` is safe, as far as I can tell. llvm-svn: 251097
* [AVR] Add ELF constants to headersDylan McKay2015-10-231-0/+19
| | | | | | | | Also adds a 'trivial' ELF file. This was generated by assembling and linking a file with the symbol main which contains a single return instruction. llvm-svn: 251096
* Add more intrumentation/runtime helper interfaces (NFC)Xinliang David Li2015-10-231-25/+17
| | | | | | | | | | | This patch converts the remaining references to literal strings for names of profile runtime entites (such as profile runtime hook, runtime hook use function, profile init method, register function etc). Also added documentation for all the new interfaces. llvm-svn: 251093
* SLPVectorizer: AllSameOpcode* starts "true" only for instructionsMehdi Amini2015-10-231-3/+4
| | | | | | | r251085 wasn't as NFC as intended... From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 251087
* SLPVectorizer: refactor reorderInputsAccordingToOpcode (NFC)Mehdi Amini2015-10-231-52/+81
| | | | | | | This is intended to simplify the changes needed to solve PR25247. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 251085
* [CodeGen] Remove usage of NDEBUG in header.Davide Italiano2015-10-231-7/+0
| | | | | | Moreover, this seems unused. llvm-svn: 251081
* [libFuzzer] use the indirect caller-callee counter as an independent search ↵Kostya Serebryany2015-10-227-1/+79
| | | | | | heuristic llvm-svn: 251078
* [libFuzzer] more refactoring the code that checks the coverage. NFCKostya Serebryany2015-10-222-8/+9
| | | | llvm-svn: 251075
* [libFuzzer] refactoring the code that checks the coverage. NFCKostya Serebryany2015-10-222-33/+43
| | | | llvm-svn: 251074
* [libFuzzer] remove the deprecated 'tokens' featureKostya Serebryany2015-10-227-99/+8
| | | | llvm-svn: 251069
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