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* Move x86 specific bits of the COFF writer to lib/Target/X86.Rafael Espindola2011-12-245-40/+91
| | | | llvm-svn: 147231
* Define trivial destructor inline.Rafael Espindola2011-12-241-3/+0
| | | | llvm-svn: 147230
* Make GetRelocType pure virtual.Rafael Espindola2011-12-241-8/+0
| | | | llvm-svn: 147229
* Fix typo "infinte".Nick Lewycky2011-12-231-1/+2
| | | | llvm-svn: 147226
* When not destroying the source, the linker is not remapping the types. Added ↵Mon P Wang2011-12-232-3/+5
| | | | | | | | support to CloneFunctionInto to allow remapping for this case. llvm-svn: 147217
* Experimental support for aligned NEON spills.Jakob Stoklund Olesen2011-12-233-13/+377
| | | | | | | | | | | | | ARM targets with NEON units have access to aligned vector loads and stores that are potentially faster than unaligned operations. Add support for spilling the callee-saved NEON registers to an aligned stack area using 16-byte aligned NEON loads and store. This feature is off by default, controlled by an -align-neon-spills command line option. llvm-svn: 147211
* Add variants of the dispatchsetup pseudo for Thumb and !VFP. <rdar://10620138>Bob Wilson2011-12-224-7/+23
| | | | | | | | | | | My change r146949 added register clobbers to the eh_sjlj_dispatchsetup pseudo instruction, but on Thumb1 some of those registers cannot be used. This caused massive failures on the testsuite when compiling for Thumb1. While fixing that, I noticed that the eh_sjlj_setjmp instruction has a "nofp" variant, and I realized that dispatchsetup needs the same thing, so I have added that as well. llvm-svn: 147204
* TableGen: add a commentDylan Noblesmith2011-12-221-1/+1
| | | | llvm-svn: 147199
* try to fix MSVC buildDylan Noblesmith2011-12-221-0/+3
| | | | llvm-svn: 147198
* drop unneeded config.h includesDylan Noblesmith2011-12-227-7/+1
| | | | llvm-svn: 147197
* Fix 80-column violations.Chad Rosier2011-12-221-11/+14
| | | | llvm-svn: 147192
* Move all the dependencies on X86FixupKinds.h to a single method in preparationRafael Espindola2011-12-221-27/+34
| | | | | | to moving it to lib/Target/X86. llvm-svn: 147190
* ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).Jim Grosbach2011-12-224-16/+70
| | | | | | rdar://10558523 llvm-svn: 147189
* Add missing usesCustomInserter flag on Int_eh_sjlj_setjmp_nofp.Bob Wilson2011-12-221-1/+1
| | | | | | Noticed by inspection; I don't have a testcase for this. llvm-svn: 147188
* Tidy up. Use predicate function a bit more liberally.Jim Grosbach2011-12-221-97/+52
| | | | llvm-svn: 147184
* Fix incorrect relocation generation. Patch by Kristof Beyls.Rafael Espindola2011-12-221-8/+1
| | | | | | Fixes PR11214. llvm-svn: 147180
* Add the actual code for r147175.Chad Rosier2011-12-221-11/+82
| | | | llvm-svn: 147176
* ARM VFP add encoding of the bitcount to fixed-point<-->floating point. insns.Jim Grosbach2011-12-221-0/+3
| | | | | | | | | | The value from the operands isn't right yet, but we weren't encoding it at all previously. The parser needs to twiddle the values when building the instruction. Partial for: rdar://10558523 llvm-svn: 147170
* Remove some bogus comments.Jim Grosbach2011-12-221-36/+18
| | | | llvm-svn: 147169
* ARM pre-UAL aliases. fcmp[sd].Jim Grosbach2011-12-222-1/+3
| | | | llvm-svn: 147158
* Fix an incomplete refactoring of the ppc backend. Thanks to rdivacky for ↵Rafael Espindola2011-12-222-15/+3
| | | | | | | | reporting it. It does need some some tests... llvm-svn: 147154
* ARM assembler should accept shift-by-zero for any shifted-immediate operand.Jim Grosbach2011-12-221-0/+33
| | | | | | | | Just treat it as-if the shift wasn't there at all. 'as' compatibility. rdar://10604767 llvm-svn: 147153
* ARM assembly parser canonicallize on 'lsl' for shift-by-zero form.Jim Grosbach2011-12-221-0/+4
| | | | llvm-svn: 147152
* Tidy up. Trailing whitespace.Jim Grosbach2011-12-221-2/+2
| | | | llvm-svn: 147151
* Nuke invalid comment from copy/paste.Jim Grosbach2011-12-221-1/+0
| | | | llvm-svn: 147150
* Give string constants generated by IRBuilder private linkage.Benjamin Kramer2011-12-221-1/+1
| | | | | | Fixes PR11640. llvm-svn: 147144
* Make the unreachable probability much much heavier. The previousChandler Carruth2011-12-221-2/+3
| | | | | | | | | | probability wouldn't be considered "hot" in some weird loop structures or other compounding probability patterns. This makes it much harder to confuse, but isn't really a principled fix. I'd actually like it if we could model a zero probability, as it would make this much easier to reason about. Suggestions for how to do this better are welcome. llvm-svn: 147142
* Kill the monstrosity that was ELFObjectWriter.h.Rafael Espindola2011-12-222-361/+331
| | | | llvm-svn: 147136
* Misc cleanups.Rafael Espindola2011-12-222-76/+58
| | | | llvm-svn: 147135
* Fix APInt::rotl and APInt::rotr so that they work correctly. Found while ↵Eli Friedman2011-12-221-12/+4
| | | | | | writing some code that tried to use them. llvm-svn: 147134
* Move the Mips only bits of the ELF writer to lib/Target/Mips.Rafael Espindola2011-12-226-145/+146
| | | | llvm-svn: 147133
* Make the virtual methods in ARMELFObjectWriter public.Rafael Espindola2011-12-221-7/+6
| | | | llvm-svn: 147132
* Speculatively revert r146578 to determine if it is the cause of a number ofChad Rosier2011-12-221-82/+11
| | | | | | | | | | | performance regressions (both execution-time and compile-time) on our nightly testers. Original commit message: Fix for bug #11429: Wrong behaviour for switches. Small improvement for code size heuristics. llvm-svn: 147131
* Move the MBlaze ELF writer bits to lib/Target/MBlaze.Rafael Espindola2011-12-226-71/+86
| | | | llvm-svn: 147129
* Hoisted some loop invariant smallvector lookups out of a MachineLICM loopPete Cooper2011-12-221-1/+3
| | | | llvm-svn: 147127
* Fix cmake.Rafael Espindola2011-12-221-0/+1
| | | | llvm-svn: 147126
* Changed MachineLICM to use a worklist list MachineCSE instead of recursion.Pete Cooper2011-12-221-44/+125
| | | | | | Fixes <rdar://problem/10584116> llvm-svn: 147125
* Move PPC bits to lib/Target/PowerPC.Rafael Espindola2011-12-225-94/+120
| | | | llvm-svn: 147124
* Hopefully fix the cmake build.Rafael Espindola2011-12-221-0/+1
| | | | llvm-svn: 147121
* Fix name in comments.Rafael Espindola2011-12-221-1/+1
| | | | llvm-svn: 147119
* Local dynamic TLS model for direct object output. Create the correct TLS MIPSAkira Hatanaka2011-12-225-0/+49
| | | | | | | | ELF relocations. Patch by Jack Carter. llvm-svn: 147118
* Unbreak cmake build after r147115.Richard Smith2011-12-221-0/+1
| | | | llvm-svn: 147117
* Move the ARM specific parts of the ELF writer to Target/ARM.Rafael Espindola2011-12-226-275/+310
| | | | llvm-svn: 147115
* getEFlags is const.Rafael Espindola2011-12-222-5/+5
| | | | llvm-svn: 147114
* ARM NEON mnemonic aliase for vrecpeq.Jim Grosbach2011-12-211-0/+3
| | | | llvm-svn: 147109
* ARM VFP optional data type on VMOV GPR<-->SPR.Jim Grosbach2011-12-211-3/+11
| | | | llvm-svn: 147104
* ARM NEON optional data type on VSWP instructions.Jim Grosbach2011-12-211-0/+6
| | | | llvm-svn: 147103
* ARM NEON mnemonic aliases for vzipq and vswpq.Jim Grosbach2011-12-211-0/+3
| | | | llvm-svn: 147102
* Revert patch from 147090. There is not point to make code less readable if weJakub Staszak2011-12-211-43/+45
| | | | | | don't get any serious benefit there. llvm-svn: 147101
* ARM asm parser should be more lenient w/ .thumb_func directive.Jim Grosbach2011-12-211-8/+17
| | | | | | | | | | Rather than require the symbol to be explicitly an argument of the directive, allow it to look ahead and grab the symbol from the next non-whitespace line. rdar://10611140 llvm-svn: 147100
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