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* [X86] Tidyup subvector insert/extract helpers. NFCI.Simon Pilgrim2017-05-021-24/+9
| | | | | | Use getConstantOperandVal where possible. llvm-svn: 301912
* Fix typo in comment. NFCI.Simon Pilgrim2017-05-021-2/+2
| | | | llvm-svn: 301911
* [SelectionDAG] Improve support for promotion of <1 x fX> floating point ↵Simon Pilgrim2017-05-023-13/+20
| | | | | | | | | | | | argument types (PR31088) PR31088 demonstrated that we were assuming that only integers require promotion from <1 x iX> types, when in fact float types may require it as well - in this case half floats. This patch adds support for extension/truncation for both integer and float types. Differential Revision: https://reviews.llvm.org/D32391 llvm-svn: 301910
* [DAGCombiner] Improve MatchBswapHword logic (PR31357)Simon Pilgrim2017-05-021-11/+16
| | | | | | | | | | | | The existing code only looks at half of the tree when matching bswap + rol patterns ending in an OR tree (as opposed to a cascade). Patch originally introduced by Jim Lewis. Submitted on the behalf of Dinar Temirbulatov. Differential Revision: https://reviews.llvm.org/D32039 llvm-svn: 301907
* [ARM] GlobalISel: Use TableGen instruction selectorDiana Picus2017-05-025-22/+57
| | | | | | | | | | | Emit and use the TableGen instruction selector for ARM. At the moment, this allows us to remove the hand-written code for selecting G_SDIV and G_UDIV. Future commits will focus on increasing the code coverage for it and removing more dead code from the current instruction selector. llvm-svn: 301905
* [APInt] Move APInt::getSplat out of line.Craig Topper2017-05-021-0/+11
| | | | | | I think this method is probably too complex to be inlined. llvm-svn: 301901
* [APInt] Move the setBit and clearBit methods inline.Craig Topper2017-05-021-16/+0
| | | | | | This makes setBit/clearBit more consistent with setBits which is already inlined. llvm-svn: 301900
* Refactor callsite cost computation into a helper function /NFCXinliang David Li2017-05-021-29/+35
| | | | | | | Makes code more readable. The function will also be used by the partial inlining's cost analysis. llvm-svn: 301899
* [PartialInlining] Hook up inline cost analysisXinliang David Li2017-05-021-11/+98
| | | | | | Differential Revision: http://reviews.llvm.org/D32666 llvm-svn: 301894
* [AVR] Save/restore the frame pointer for all functionsDylan McKay2017-05-021-11/+10
| | | | | | | A recent commit I made made it so that we only did this for signal or interrupt handlers. This broke normal functions. llvm-svn: 301893
* [PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LENemanja Ivanovic2017-05-022-6/+23
| | | | | | | | | | | | | Fixes PR30730. This is a re-commit of a pulled commit. The commit was pulled because some software projects contained uses of Altivec vectors that violated alignment requirements. Known issues have now been fixed. Committing on behalf of Lei Huang. Differential Revision: https://reviews.llvm.org/D26861 llvm-svn: 301892
* [AVR] Fix a bug where the frame pointer is clobberedDylan McKay2017-05-021-7/+17
| | | | | | | | | | | | | | | Because it was a callee-saved register, we automatically generated code to spill and unspill its original value so that it is restored after the function returns. The problem is that this code was being generated before the epilogue. The epilogue itself uses the Y register, which could be prematurely restored by the CSR restoration process. This removes R29R28 from the CSR list and changes the prologue/epilogue code to handle it explicitly. llvm-svn: 301887
* Revert r301880George Burgess IV2017-05-011-13/+0
| | | | | | | | | This change caused buildbot failures, apparently because we're not passing around types that InstSimplify is used to seeing. I'm not overly familiar with InstSimplify, so I'm reverting this until I can figure out what exactly is wrong. llvm-svn: 301885
* Stylistic makeover of DWARFDebugLine before working on it. NFCPaul Robinson2017-05-011-180/+177
| | | | | | | Rename parameters and locals to CamelCase, doxygenize the header, and run clang-format on the whole thing. llvm-svn: 301883
* [CodeView] Write CodeView line information.Zachary Turner2017-05-019-7/+246
| | | | | | Differential Revision: https://reviews.llvm.org/D32716 llvm-svn: 301882
* [AVR] Enable the frame pointer for all functionsDylan McKay2017-05-011-2/+3
| | | | | | | This is a temporary measure while we figure out a way to get the frame pointer working correctly. llvm-svn: 301881
* [InstSimplify] Handle selects of GEPs with 0 offsetGeorge Burgess IV2017-05-011-0/+13
| | | | | | | | | In particular (since it wouldn't fit nicely in the summary): (select (icmp eq V 0) P (getelementptr P V)) -> (getelementptr P V) Differential Revision: https://reviews.llvm.org/D31435 llvm-svn: 301880
* [X86] Reduce code for setting operations actions by merging into loops ↵Simon Pilgrim2017-05-011-129/+68
| | | | | | across multiple types/ops. NFCI. llvm-svn: 301879
* Empty Space. NFCXin Tong2017-05-011-1/+1
| | | | llvm-svn: 301878
* Fix a pessimising move warning.Peter Collingbourne2017-05-011-5/+1
| | | | llvm-svn: 301852
* MachineFrameInfo: Track whether MaxCallFrameSize is computed yet; NFCMatthias Braun2017-05-012-2/+4
| | | | | | | | | | This tracks whether MaxCallFrameSize is computed yet. Ideally we would assert and fail when the value is queried before it is computed, however this fails various targets that need to be fixed first. Differential Revision: https://reviews.llvm.org/D32570 llvm-svn: 301851
* [NewGVN] Don't derive incorrect implications.Davide Italiano2017-05-011-4/+4
| | | | | | | | | | | | | | In the testcase attached, we believe %tmp1 implies %tmp4. where: br i1 %tmp1, label %bb2, label %bb7 br i1 %tmp4, label %bb5, label %bb7 because Wwhile looking at PredicateInfo stuffs we end up calling isImpliedTrueByMatchingCmp() with the arguments backwards. Differential Revision: https://reviews.llvm.org/D32718 llvm-svn: 301849
* [InstCombine] check one-use before applying DeMorgan nor/nand foldsSanjay Patel2017-05-011-10/+14
| | | | | | | | | | | | | | | If we have ~(~X & Y), it only makes sense to transform it to (X | ~Y) when we do not need the intermediate (~X & Y) value. In that case, we would need an extra instruction to generate ~Y + 'or' (as shown in the test changes). It's ok if we have multiple uses of ~X or Y, however. In those cases, we may not reduce the instruction count or critical path, but we might improve throughput because we can generate ~X and ~Y in parallel. Whether that actually makes perf sense or not for a target is something we can't answer in IR. Differential Revision: https://reviews.llvm.org/D32703 llvm-svn: 301848
* Adds initial llvm-dwarfdump --verify support with unit tests.Greg Clayton2017-05-012-2/+117
| | | | | | | | | | | | | | | | | | lldb-dwarfdump gets a new "--verify" option that will verify a single file's DWARF debug info and will print out any errors that it finds. It will return an non-zero exit status if verification fails, and a zero exit status if verification succeeds. Adding the --quiet option will suppress any output the STDOUT or STDERR. The first part of the verify does the following: - verifies that all CU relative references (DW_FORM_ref1, DW_FORM_ref2, DW_FORM_ref4, DW_FORM_ref8, DW_FORM_ref_udata) have valid CU offsets - verifies that all DW_FORM_ref_addr references have valid .debug_info offsets - verifies that all DW_AT_ranges attributes have valid .debug_ranges offsets - verifies that all DW_AT_stmt_list attributes have valid .debug_line offsets - verifies that all DW_FORM_strp attributes have valid .debug_str offsets Unit tests were added for each of the above cases. Differential Revision: https://reviews.llvm.org/D32707 llvm-svn: 301844
* Bitcode: Make the summary reader responsible for merging. NFCI.Peter Collingbourne2017-05-014-74/+70
| | | | | | | | | This is to prepare for an upcoming change which uses pointers instead of GUIDs to represent references. Differential Revision: https://reviews.llvm.org/D32469 llvm-svn: 301843
* [AArch64] Move GISel accessor initialization from TargetMachine to Subtarget.Quentin Colombet2017-05-012-56/+64
| | | | | | NFC llvm-svn: 301841
* IPO: Add missing build dep.Peter Collingbourne2017-05-011-1/+1
| | | | llvm-svn: 301835
* [X86][AVX] Rename LowerVectorBroadcast to lowerBuildVectorAsBroadcast. NFCI.Simon Pilgrim2017-05-011-11/+8
| | | | | | Since the shuffle refactor, this is only used during BUILD_VECTOR lowering. llvm-svn: 301834
* Object: Remove ModuleSummaryIndexObjectFile class.Peter Collingbourne2017-05-016-142/+26
| | | | | | Differential Revision: https://reviews.llvm.org/D32195 llvm-svn: 301832
* [Hexagon] Replace CVI_VM_CUR_LD type with CVI_VM_LDKrzysztof Parzyszek2017-05-0110-114/+187
| | | | | | | | A .cur instruction can be identified by checking isCVINew() && mayLoad(). Patch by Colin LeMahieu. llvm-svn: 301829
* [Hexagon] Improving error reporting for writing to read only registersKrzysztof Parzyszek2017-05-013-8/+23
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301828
* [Hexagon] Give better error messages for solo instruction errorsKrzysztof Parzyszek2017-05-012-7/+11
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301827
* [Hexagon] Improve shuffle error reportingKrzysztof Parzyszek2017-05-0111-482/+276
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301823
* X86: initialize a few subtarget variables.Tim Northover2017-05-011-0/+3
| | | | | | Otherwise an indeterminate value gets read, causing a bunch of UBSan failures. llvm-svn: 301819
* Take indirect branch into account as well when folding.Xin Tong2017-05-011-6/+10
| | | | | | | | We may not be able to rewrite indirect branch target, but we also want to take it into account when folding, i.e. if it and all its successor's predecessors go to the same destination, we can fold, i.e. no need to thread. llvm-svn: 301816
* Add a new WeakVH value handle; NFCSanjoy Das2017-05-011-2/+5
| | | | | | This relands r301425. llvm-svn: 301813
* Rename WeakVH to WeakTrackingVH; NFCSanjoy Das2017-05-0126-142/+136
| | | | | | This relands r301424. llvm-svn: 301812
* [WebAssembly] Fix use of SDNodeFlags after API change in r301803Derek Schuff2017-05-011-2/+2
| | | | llvm-svn: 301811
* [PDB/CodeView] Rename some classes.Zachary Turner2017-05-015-20/+22
| | | | | | | | | | | | In preparation for introducing writing capabilities for each of these classes, I would like to adopt a Foo / FooRef naming convention, where Foo indicates that the class can manipulate and serialize Foos, and FooRef indicates that it is an immutable view of an existing Foo. In other words, Foo is a writer and FooRef is a reader. This patch names some existing readers to conform to the FooRef convention, while offering no functional change. llvm-svn: 301810
* Emulate TrackingVH using WeakVHSanjoy Das2017-05-011-16/+3
| | | | | | | | | | | | | | | | Summary: This frees up one slot in the HandleBaseKind enum, which I will use later to add a new kind of value handle. The size of the HandleBaseKind enum is important because we store a HandleBaseKind in the low two bits of a (in the worst case) 4 byte aligned pointer. Reviewers: davide, chandlerc Subscribers: mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D32634 llvm-svn: 301809
* [JumpThread] Add some assertions for expected ConstantInt/BlockAddressXin Tong2017-05-011-2/+5
| | | | llvm-svn: 301808
* Remove unnecessary conditions as suggested by clang-tidy. NFCGabor Horvath2017-05-013-8/+4
| | | | | | | | Patch by: Gergely Angeli! Differential Revision: https://reviews.llvm.org/D31936 llvm-svn: 301807
* [SelectionDAG] Use known ones to provide a better bound for the known zeros ↵Craig Topper2017-05-011-2/+16
| | | | | | | | | | | | | | for CTTZ/CTLZ operations. This is the SelectionDAG version of D32521. If know where at least one 1 is located in the input to these intrinsics we can place an upper bound on the number of bits needed to represent the count and thus increase the number of known zeros in the output. I think we can also refine this further for CTTZ_UNDEF/CTLZ_UNDEF by assuming that the answer will never be BitWidth. I've left this out for now because it caused other test failures across multiple targets. Usually because of turning ADD into OR based on this new information. I'll fix CTPOP in a future patch. Differential Revision: https://reviews.llvm.org/D32692 llvm-svn: 301806
* [JumpThread] Do RAUW in case Cond folds to a constant in the CFGXin Tong2017-05-011-8/+24
| | | | | | | | | | | | | | Summary: [JumpThread] Do RAUW in case Cond folds to a constant in the CFG Reviewers: sanjoy Reviewed By: sanjoy Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32407 llvm-svn: 301804
* Generalize the specialized flag-carrying SDNodes by moving flags into SDNode.Amara Emerson2017-05-0112-160/+125
| | | | | | | | This removes BinaryWithFlagsSDNode, and flags are now all passed by value. Differential Revision: https://reviews.llvm.org/D32527 llvm-svn: 301803
* [LLVM][inline-asm] Altmacro absolute expression '%' featureMichael Zuckerman2017-05-012-7/+51
| | | | | | | | | | | | | | | | | | | | | In this patch, I introduce a new alt macro feature. This feature adds meaning for the % when using it as a prefix to the calling macro arguments. In the altmacro mode, the percent sign '%' before an absolute expression convert the expression first to a string. As described in the https://sourceware.org/binutils/docs-2.27/as/Altmacro.html "Expression results as strings You can write `%expr' to evaluate the expression expr and use the result as a string." expression assumptions: 1. '%' can only evaluate an absolute expression. 2. Altmacro '%' must be the first character of the evaluated expression. 3. If no '%' is located before the expression, a regular module operation is expected. 4. The result of Absolute Expressions can be only integer. Differential Revision: https://reviews.llvm.org/D32526 llvm-svn: 301797
* [AVR] Implement non-constant bit rotationsDylan McKay2017-05-013-1/+63
| | | | | | This lets us do bit rotations of variable amount. llvm-svn: 301794
* [GlobalISel][X86] Prioritize Tablegen-erated instruction selection. NFCIgor Breger2017-05-011-50/+8
| | | | | | | | | | | | | | | | Summary: Prioritizes Tablegen-erated instruction selection over C++ instruction selection. Remove G_ADD/G_SUB C++ selection - implemented by Tablegen. Reviewers: dsanders, zvi, guyblank Reviewed By: guyblank Subscribers: rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D32677 llvm-svn: 301792
* [GlobalISel][X86] G_SEXT/G_ZEXT support.Igor Breger2017-05-011-0/+20
| | | | | | | | | | | | Reviewers: zvi, guyblank Reviewed By: zvi Subscribers: rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D32591 llvm-svn: 301790
* [GlobalISel][X86] G_LOAD/G_STORE pointer selection support.Igor Breger2017-05-011-2/+2
| | | | | | | | | | | | | | Summary: [GlobalISel][X86] G_LOAD/G_STORE pointer selection support. Reviewers: zvi, guyblank Reviewed By: zvi, guyblank Subscribers: dberris, rovka, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D32217 llvm-svn: 301788
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