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* [X86] Update comment I forgot to change in r346043. NFCCraig Topper2018-11-031-2/+2
| | | | llvm-svn: 346073
* [ValueTracking] peek through 2-input shuffles in ComputeNumSignBitsSanjay Patel2018-11-031-19/+34
| | | | | | | | | | | This patch gives the IR ComputeNumSignBits the same functionality as the DAG version (the code is derived from the existing code). This an extension of the single input shuffle analysis added with D53659. Differential Revision: https://reviews.llvm.org/D53987 llvm-svn: 346071
* [codeview] Let the X86 backend tell us the VFRAME offset adjustmentReid Kleckner2018-11-033-17/+15
| | | | | | | | | | | Use MachineFrameInfo's OffsetAdjustment field to pass this information from the target to CodeViewDebug.cpp. The X86 backend doesn't use it for any other purpose. This fixes PR38857 in the case where there is a non-aligned quantity of CSRs and a non-aligned quantity of locals. llvm-svn: 346062
* [DWARF v5] Verifier: Add checks for DW_FORM_strx* forms.Wolfgang Pieb2018-11-031-0/+39
| | | | | | | | | Adding functionality to the DWARF verifier for DWARF v5 strx* forms which index into the string offsets table. Differential Revision: https://reviews.llvm.org/D54049 llvm-svn: 346061
* [LTO] Fix a crash caused by accessing an empty ValueInfoTeresa Johnson2018-11-021-12/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ModuleSummaryIndex::exportToDot crashes when linking the Linux kernel under ThinLTO using LLVMgold.so. This is due to the exportToDot function trying to get the GUID of an empty ValueInfo. The root cause related to the fact that we attempt to get the GUID of an aliasee via its OriginalGUID recorded in the aliasee summary, and that is not always possible. Specifically, we cannot do this mapping when the value is internal linkage and there were other internal linkage symbols with the same name. There are 2 fixes for the problem included here. 1) In all cases where we can currently print the dot file from the command line (which is only via save-temps), we have a valid AliaseeGUID in the AliasSummary. Use that when it is available, so that we can get the correct aliasee GUID whenever possible. 2) However, if we were to invoke exportToDot from the debugger right after it is built during the initial analysis step (i.e. the per-module summary), we won't have the AliaseeGUID field populated. In that case, we have a fallback fix that will simply print "@"+GUID when we aren't able to get the GUID from the OriginalGUID. It simply checks if the VI is valid or not before attempting to get the name. Additionally, since getAliaseeGUID will assert that the AliaseeGUID is non-zero, guard the earlier fix #1 by a new function hasAliaseeGUID(). Reviewers: pcc, tmroeder Subscribers: evgeny777, mehdi_amini, inglorion, dexonsmith, arphaman, llvm-commits Differential Revision: https://reviews.llvm.org/D53986 llvm-svn: 346055
* [X86] In LowerEXTEND_VECTOR_INREG, emit a vector shuffle instead of directly ↵Craig Topper2018-11-021-1/+1
| | | | | | | | using X86ISD::UNPCKL The majority of the changes are because the rest of shuffle lowering/combining prefers to replace the undef input with the other operand. Using UNPCKL directly seemed to avoid this and just grabbed a randomish register for the undef which can create false dependencies. llvm-svn: 346050
* [WebAssembly] Parsing missing directives to produce valid .oWouter van Oortmerssen2018-11-022-33/+101
| | | | | | | | | | | | | | | | | | | | | | | Summary: The assembler was able to assemble and then dump back to .s, but was failing to parse certain directives necessary for valid .o output: - .type directives are now recognized to distinguish function symbols and others. - .size is now parsed to provide function size. - .globaltype (introduced in https://reviews.llvm.org/D54012) is now recognized to ensure symbols like __stack_pointer have a proper type set for both .s and .o output. Also added tests for the above. Reviewers: sbc100, dschuff Subscribers: jgravelle-google, aheejin, dexonsmith, kristina, llvm-commits, sunfish Differential Revision: https://reviews.llvm.org/D53842 llvm-svn: 346047
* [X86] Don't emit *_extend_vector_inreg nodes when both the input and output ↵Craig Topper2018-11-022-28/+19
| | | | | | | | | | | | | | | | types are legal with AVX1 We already have custom lowering for the AVX case in LegalizeVectorOps. So its better to keep the regular extend op around as long as possible. I had to qualify one place in DAG combine that created illegal vector extending load operations. This change by itself had no effect on any tests which is why its included here. I've made a few cleanups to the custom lowering. The sign extend code no longer creates an identity shuffle with undef elements. The zero extend code now emits a zero_extend_vector_inreg instead of an unpckl with a zero vector. For the high half of the custom lowering of zero_extend/any_extend, we're now using an unpckh with a zero vector or undef. Previously we used used a pshufd to move the upper 64-bits to the lower 64-bits and then used a zero_extend_vector_inreg. I think the zero vector should require less execution resources and be smaller code size. Differential Revision: https://reviews.llvm.org/D54024 llvm-svn: 346043
* [DWARF] Fix typo, .gnu_index -> .gdb_indexFangrui Song2018-11-021-1/+1
| | | | llvm-svn: 346039
* [RISCV] Add some missing expansions for floating-point intrinsicsAlex Bradbury2018-11-021-0/+9
| | | | | | | | | | | | | | | | | | A number of intrinsics, such as llvm.sin.f32, would result in a failure to select. This patch adds expansions for the relevant selection DAG nodes, as well as exhaustive testing for all f32 and f64 intrinsics. The codegen for FMA remains a TODO item, pending support for the various RISC-V FMA instruction variants. The llvm.minimum.f32.* and llvm.maximum.* tests are commented-out, pending upstream support for target-independent expansion, as discussed in http://lists.llvm.org/pipermail/llvm-dev/2018-November/127408.html. Differential Revision: https://reviews.llvm.org/D54034 Patch by Luís Marques. llvm-svn: 346034
* [WebAssembly] Change indices types to unsined int (NFC)Heejin Ahn2018-11-021-4/+4
| | | | | | | | | | | | | | | | Summary: This changes int types to unsigned int in a few places: function indices and `wasm::Valtype` (which is unsigend int enum). Currently these values cannot have negative values anyway, so this should not be a functional change for now. Reviewers: sbc100 Subscribers: dschuff, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54044 llvm-svn: 346031
* [WebAssembly] Fix bugs in rethrow depth counting and InstPrinterHeejin Ahn2018-11-022-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: EH stack depth is incremented at `try` and decremented at `catch`. When there are more than two catch instructions for a try instruction, we shouldn't count non-first catches when calculating EH stack depths. This patch fixes two bugs: - CFGStackify: Exclude `catch_all` in the terminate catch pad when calculating EH pad stack, because when we have multiple catches for a try we should count only the first catch instruction when calculating EH pad stack. - InstPrinter: The initial intention was also to exclude non-first catches, but it didn't account nested try-catches, so it failed on this case: ``` try try catch end catch <-- (1) end ``` In the example, when we are at the catch (1), the last seen EH instruction is not `try` but `end_try`, violating the wrong assumption. We don't need these after we switch to the second proposal because there is gonna be only one `catch` instruction. But anyway before then these bugfixes are necessary for keep trunk in working state. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D53819 llvm-svn: 346029
* [DebugInfo][InstMerge] Fix -debugify for phi node created by -mldst-motionJordan Rupprecht2018-11-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: -mldst-motion creates a new phi node without any debug info. Use the merged debug location from the incoming stores to fix this. Fixes PR38177. The test case here is (somewhat) simplified from: ``` struct S { int foo; void fn(int bar); }; void S::fn(int bar) { if (bar) foo = 1; else foo = 0; } ``` Reviewers: dblaikie, gbedwell, aprantl, vsk Reviewed By: vsk Subscribers: vsk, JDevlieghere, llvm-commits Tags: #debug-info Differential Revision: https://reviews.llvm.org/D54019 llvm-svn: 346027
* ARMExpandPseudoInsts: Fix CMP_SWAP expansion adding a kill flag to a defMatthias Braun2018-11-021-4/+5
| | | | llvm-svn: 346026
* [SystemZ::TTI] Improve cost handling of uint/sint to fp conversions.Jonas Paulsson2018-11-021-4/+6
| | | | | | | | | | | | Let i8/i16 uint/sint to fp conversions cost 1 if operand is a load. Since the load already does the extension, there is no extra cost (previously returned 2). Review: Ulrich Weigand https://reviews.llvm.org/D54028 llvm-svn: 346009
* [ProfileSummary] Add options to override hot and cold count thresholds.Easwaran Raman2018-11-021-0/+18
| | | | | | | | | | | | | | Summary: The hot and cold count thresholds are derived from the summary, but for debugging purposes it is convenient to provide the actual thresholds. Reviewers: davidxl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D54040 llvm-svn: 346005
* Fixed inclusion of M_PI fow MinGW-w64Sylvestre Ledru2018-11-021-1/+1
| | | | | | Patch by KOLANICH llvm-svn: 346000
* [SystemZ] Rework getInterleavedMemoryOpCost()Jonas Paulsson2018-11-021-16/+48
| | | | | | | | | | | | | Model this function more closely after the BasicTTIImpl version, with separate handling of loads and stores. For loads, the set of actually loaded vectors is checked. This makes it more readable and just slightly more accurate generally. Review: Ulrich Weigand https://reviews.llvm.org/D53071 llvm-svn: 345998
* [MachineSink][DebugInfo] Correctly sink DBG_VALUEsJeremy Morse2018-11-021-10/+47
| | | | | | | | | | | | | | | As reported in PR38952, postra-machine-sink relies on DBG_VALUE insns being adjacent to the def of the register that they reference. This is not always true, leading to register copies being sunk but not the associated DBG_VALUEs, which gives the debugger a bad variable location. This patch collects DBG_VALUEs as we walk through a BB looking for copies to sink, then passes them down to performSink. Compile-time impact should be negligable. Differential Revision: https://reviews.llvm.org/D53992 llvm-svn: 345996
* [ValueTracking] allow non-canonical shuffles when computing signbitsSanjay Patel2018-11-021-8/+10
| | | | | | | This possibility is noted in D53987 for a different case, so we need to adjust the existing code. llvm-svn: 345988
* [Hexagon] Do not reduce load size for globals in small-dataKrzysztof Parzyszek2018-11-022-0/+18
| | | | | | | | | | | | Small-data (i.e. GP-relative) loads and stores allow 16-bit scaled offset. For a load of a value of type T, the small-data area is equivalent to an array "T sdata[65536]". This implies that objects of smaller sizes need to be closer to the beginning of sdata, while larger objects may be farther away, or otherwise the offset may be insufficient to reach it. Similarly, an object of a larger size should not be accessed via a load of a smaller size. llvm-svn: 345975
* [DEBUGINFO, NVPTX]DO not emit ',debug' option if no debug info or only debug ↵Alexey Bataev2018-11-023-4/+30
| | | | | | | | | | | | | | | | | directives are requested. Summary: If the output of debug directives only is requested, we should drop emission of ',debug' option from the target directive. Required for supporting of nvprof profiler. Reviewers: probinson, echristo, dblaikie Subscribers: Hahnfeld, jholewinski, llvm-commits, JDevlieghere, aprantl Differential Revision: https://reviews.llvm.org/D46061 llvm-svn: 345972
* [DAGCombiner] Remove reduceBuildVecConvertToConvertBuildVec and rely on the ↵Simon Pilgrim2018-11-021-75/+0
| | | | | | | | | | | | | vectorizers instead (PR35732) reduceBuildVecConvertToConvertBuildVec vectorizes int2float in the DAGCombiner, which means that even if the LV/SLP has decided to keep scalar code using the cost models, this will override this. While there are cases where vectorization is necessary in the DAG (mainly due to legalization artefacts), I don't think this is the case here, we should assume that the vectorizers know what they are doing. Differential Revision: https://reviews.llvm.org/D53712 llvm-svn: 345964
* [AMDGPU] UBSan bug fix for r345710Neil Henning2018-11-021-1/+1
| | | | | | | | UBSan detected an error in our ISelLowering that is exposed only when you have a dmask == 0x1. Fix this by adding in an explicit check to ensure we don't do the UBSan detected shl << 32. llvm-svn: 345962
* [LV] Avoid vectorizing loops under opt for size that involve SCEV checksAyal Zaks2018-11-021-1/+25
| | | | | | | | | | | | | | Fix PR39417, PR39497 The loop vectorizer may generate runtime SCEV checks for overflow and stride==1 cases, leading to execution of original scalar loop. The latter is forbidden when optimizing for size. An assert introduced in r344743 triggered the above PR's showing it does happen. This patch fixes this behavior by preventing vectorization in such cases. Differential Revision: https://reviews.llvm.org/D53612 llvm-svn: 345959
* [XRay] Update delta computations in runtimeDean Michael Berris2018-11-021-4/+4
| | | | | | | | | | | | | | | | | | Summary: Fix some issues discovered from mostly manual inspection of outputs from the `llvm-xray fdr-dump` tool. It turns out we haven't been writing the deltas properly, and have been writing down zeros for deltas of some records. This change fixes this oversight born by the recent refactoring. Reviewers: mboerger Subscribers: llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D54022 llvm-svn: 345954
* AMDGPU: Fix assertion with bitcast from i64 constant to v4i16Matt Arsenault2018-11-021-3/+4
| | | | llvm-svn: 345922
* LLVMTargetMachine/TargetPassConfig: Simplify handling of start/stop options; NFCMatthias Braun2018-11-022-27/+28
| | | | | | | | | | - Make some TargetPassConfig methods that just check whether options have been set static. - Shuffle code in LLVMTargetMachine around so addPassesToGenerateCode only deals with TargetPassConfig now (but not with MCContext or the creation of MachineModuleInfo) llvm-svn: 345918
* [WebAssembly] Added a .globaltype directive to .s output.Wouter van Oortmerssen2018-11-023-8/+20
| | | | | | | | | | | | | | | | | | | | | | | Summary: Assembly output can use globals like __stack_pointer implicitly, but has no way of indicating the type of such a global, which makes it hard for tools processing it (such as the MC Assembler) to reconstruct this information. The improved assembler directives parsing (in progress in https://reviews.llvm.org/D53842) will make use of this information. Also deleted code for the .import_global directive which was unused. New test case in userstack.ll Reviewers: dschuff, sbc100 Subscribers: jgravelle-google, aheejin, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54012 llvm-svn: 345917
* [WebAssembly] General vector shift loweringThomas Lively2018-11-021-12/+27
| | | | | | | | | | | | Summary: Adds support for lowering non-splat shifts. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D53625 llvm-svn: 345916
* [NFC][LICM] Factor out instruction erasing logicMax Kazantsev2018-11-021-11/+15
| | | | | | | | | | This patch factors out a function that makes all required updates whenever an instruction gets erased. Differential Revision: https://reviews.llvm.org/D54011 Reviewed By: apilipenko llvm-svn: 345914
* [WebAssembly] Expand inserts and extracts with variable indicesThomas Lively2018-11-022-0/+30
| | | | | | | | | | Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D53964 llvm-svn: 345913
* [AliasSetTracker] Misc cleanup (NFCI)Alina Sbirlea2018-11-011-14/+6
| | | | | Summary: Remove two redundant checks, add one in the unit test. Remove an unused method. Fix computation of TotalMayAliasSetSize. llvm-svn: 345911
* [COFF, ARM64] Implement Intrinsic.sponentry for AArch64Mandeep Singh Grang2018-11-016-0/+34
| | | | | | | | | | | | | | | | Summary: This patch adds Intrinsic.sponentry. This intrinsic is required to correctly support setjmp for AArch64 Windows platform. Patch by: Yin Ma (yinma@codeaurora.org) Reviewers: mgrang, ssijaric, eli.friedman, TomTan, mstorsjo, rnk, compnerd, efriedma Reviewed By: efriedma Subscribers: efriedma, javed.absar, kristof.beyls, chrib, llvm-commits Differential Revision: https://reviews.llvm.org/D53996 llvm-svn: 345909
* [DAGCombiner] Make the isTruncateOf call from visitZERO_EXTEND work for ↵Craig Topper2018-11-011-16/+13
| | | | | | | | vectors. Remove FIXME. I'm having trouble creating a test case for the ISD::TRUNCATE part of this that shows any codegen differences. But I was able to test the setcc path which is what the test changes here cover. llvm-svn: 345908
* [MachineOutliner][NFC] Remember when you map something illegal across MBBsJessica Paquette2018-11-011-20/+27
| | | | | | | | | | | | | | | | | | | | | Instruction mapping in the outliner uses "illegal numbers" to signify that something can't ever be part of an outlining candidate. This means that the number is unique and can't be part of any repeated substring. Because each of these is unique, we can use a single unique number to represent a range of things we can't outline. The outliner tries to leverage this using a flag which is set in an MBB when the previous instruction we tried to map was "illegal". This patch improves that logic to work across MBBs. As a bonus, this also simplifies the mapping logic somewhat. This also updates the machine-outliner-remarks test, which was impacted by the order of Candidates on an OutlinedFunction changing. This order isn't guaranteed, so I added a FIXME to fix that in a follow-up. The order of Candidates on an OutlinedFunction isn't important, so this still is NFC. llvm-svn: 345906
* [XRay] Fix TSC and atomic custom/typed event accountingDean Michael Berris2018-11-011-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is a follow-on change to D53858 which turns out to have had a TSC accounting bug when writing out function exit records in FDR mode. This change adds a number of tests to ensure that: - We are handling the delta between the exit TSC and the last TSC we've seen. - We are writing the custom event and typed event records as a single update to the buffer extents. - We are able to catch boundary conditions when loading FDR logs. We introduce a TSC matcher to the test helpers, which we use in the testing/verification of the TSC accounting change. Reviewers: mboerger Subscribers: mgorny, hiraditya, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D53967 llvm-svn: 345905
* [IR] remove fake binop query for fnegSanjay Patel2018-11-011-19/+0
| | | | | | | | | | | | | | | | We want to remove this fneg API because it would silently fail if we add an actual fneg instruction to IR (as proposed in D53877 ). We have a newer 'match' API that makes checking for these patterns simpler. It also works with vectors that may include undef elements in constants. If any out-of-tree users need updating, they can model their code changes on this commit: https://reviews.llvm.org/rL345295 llvm-svn: 345904
* [AMDGPU] Handle the idot8 pattern generated by FE.Farhana Aleen2018-11-011-0/+9
| | | | | | | | | | | | | | Summary: Different variants of idot8 codegen dag patterns are not generated by llvm-tablegen due to a huge increase in the compile time. Support the pattern that clang FE generates after reordering the additions in integer-dot8 source language pattern. Author: FarhanaAleen Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D53937 llvm-svn: 345902
* [COFF, ARM64] Implement llvm.addressofreturnaddress intrinsicMandeep Singh Grang2018-11-011-0/+16
| | | | | | | | | | | | Reviewers: rnk, mstorsjo, efriedma, TomTan Reviewed By: efriedma Subscribers: javed.absar, kristof.beyls, chrib, llvm-commits Differential Revision: https://reviews.llvm.org/D53962 llvm-svn: 345892
* [WebAssembly] Fix signature parsing for 'try' in AsmParserHeejin Ahn2018-11-011-1/+1
| | | | | | | | | | | | | | | Summary: Like `block` or `loop`, `try` can take an optional signature which can be omitted. This patch allows `try`'s signature to be omitted. Also added some tests for EH instructions. Reviewers: aardappel Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D53873 llvm-svn: 345888
* [Hexagon] Remove unintended fallthrough from MC duplex codeReid Kleckner2018-11-011-5/+5
| | | | | | | | | | | | I added these annotations in r345878 because I wasn't sure if the fallthrough was intended. Krzysztof Parzyszek confirmed that they should be breaks, so that's what this patch does. Reviewers: kparzysz Differential Revision: https://reviews.llvm.org/D53991 llvm-svn: 345883
* Fix clang -Wimplicit-fallthrough warnings across llvm, NFCReid Kleckner2018-11-0119-13/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch should not introduce any behavior changes. It consists of mostly one of two changes: 1. Replacing fall through comments with the LLVM_FALLTHROUGH macro 2. Inserting 'break' before falling through into a case block consisting of only 'break'. We were already using this warning with GCC, but its warning behaves slightly differently. In this patch, the following differences are relevant: 1. GCC recognizes comments that say "fall through" as annotations, clang doesn't 2. GCC doesn't warn on "case N: foo(); default: break;", clang does 3. GCC doesn't warn when the case contains a switch, but falls through the outer case. I will enable the warning separately in a follow-up patch so that it can be cleanly reverted if necessary. Reviewers: alexfh, rsmith, lattner, rtrieu, EricWF, bollu Differential Revision: https://reviews.llvm.org/D53950 llvm-svn: 345882
* [LoopInterchange] Fix unused variables in release buildFlorian Hahn2018-11-011-0/+2
| | | | llvm-svn: 345881
* [WebAssembly] Fixup `main` signature by defaultSam Clegg2018-11-011-6/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D53396 llvm-svn: 345880
* [codeview] Add breaks to fix -Wimplicit-fallthroughReid Kleckner2018-11-011-0/+2
| | | | | | | | | This is a minor bug fix. Previously, if you tried to encode the RSP register on the x86 platform, that might have succeeded and been encoded incorrectly. However, no existing producer or consumer passes the x86_64 registers when targeting x86_32. llvm-svn: 345879
* Annotate possibly unintended fallthroughs in Hexagon MC code, NFCReid Kleckner2018-11-011-0/+6
| | | | | | | | | | | | | | | | Clang's -Wimplicit-fallthrough check fires on these switch cases. GCC does not warn when a case body that ends in a switch falls through to a case label of an outer switch. It's not clear if these fall throughs are truly intended. The Hexagon tests pass regardless of whether these case blocks fall through or break. For now, I have applied the intended fallthrough annotation macro with a FIXME comment to unblock enabling the warning. I will send a follow-up patch that converts them to breaks to the Hexagon maintainers. llvm-svn: 345878
* [LoopInterchange] Remove support for inner-only reductions.Florian Hahn2018-11-011-105/+20
| | | | | | | | | | | | | | | | | | | | | | Inner-loop only reductions require additional checks to make sure they form a load-phi-store cycle across inner and outer loop. Otherwise the reduction value is not properly preserved. This patch disables interchanging such loops for now, as it causes miscompiles in some cases and it seems to apply only for a tiny amount of loops. Across the test-suite, SPEC2000 and SPEC2006, 61 instead of 62 loops are interchange with inner loop reduction support disabled. With -loop-interchange-threshold=-1000, 3256 instead of 3267. See the discussion and history of D53027 for an outline of how such legality checks could look like. Reviewers: efriedma, mcrosier, davide Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D53027 llvm-svn: 345877
* Remove unnecessary fallthrough annotation after unreachableReid Kleckner2018-11-011-2/+0
| | | | | | | | | | Clang's -Wimplicit-fallthrough implementation warns on this. I built clang with GCC 7.3 in +asserts and -asserts mode, and GCC doesn't warn on this in either configuration. I think it is unnecessary. I separated it from the large mechanical patch (https://reviews.llvm.org/D53950) in case I am wrong and it has to be reverted. llvm-svn: 345876
* [GlobalISel] Fix a bug in LegalizeRuleSet::clampMaxNumElementsVolkan Keles2018-11-011-2/+4
| | | | | | | | | | | | | | | | Summary: This function was causing a crash when `MaxElements == 1` because it was trying to create a single element vector type. Reviewers: dsanders, aemerson, aditya_nandakumar Reviewed By: dsanders Subscribers: rovka, kristof.beyls, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D53734 llvm-svn: 345875
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