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* Just like in regular escape analysis, loads and stores throughDan Gohman2012-02-131-0/+10
| | | | | | | (but not of) a block pointer do not cause the block pointer to escape. This fixes rdar://10803830. llvm-svn: 150424
* ThreadSanitizer, a race detector. First LLVM commit.Kostya Serebryany2012-02-133-0/+171
| | | | | | | Clang patch (flags) will follow shortly. The run-time library will also follow, but not immediately. llvm-svn: 150423
* LiveIntervalAnalysis does not depend on MachineLoopInfo.Andrew Trick2012-02-131-4/+2
| | | | llvm-svn: 150411
* Check regmask interference for -join-physregs.Jakob Stoklund Olesen2012-02-131-0/+8
| | | | llvm-svn: 150404
* Fix a bug in DAGCombine for the optimization of BUILD_VECTOR. We cant ↵Nadav Rotem2012-02-131-2/+6
| | | | | | generate a shuffle node from two vectors of different types. llvm-svn: 150383
* Remove duplicate code in this header file which seemed to undergo a ↵Ahmed Charles2012-02-131-96/+0
| | | | | | copy/paste fiasco. llvm-svn: 150369
* Still more vector_shuffle pattern removal.Craig Topper2012-02-132-39/+9
| | | | llvm-svn: 150365
* Fix various issues (or do cleanups) found by enabling certain MSVC warnings.Ahmed Charles2012-02-134-7/+8
| | | | | | | | | - Use unsigned literals when the desired result is unsigned. This mostly allows unsigned/signed mismatch warnings to be less noisy even if they aren't on by default. - Remove misplaced llvm_unreachable. - Add static to a declaration of a function on MSVC x86 only. - Change some instances of calling a static function through a variable to simply calling that function while removing the unused variable. llvm-svn: 150364
* Remove more vector_shuffle patterns for unpack. These should be target ↵Craig Topper2012-02-131-108/+40
| | | | | | specific nodes when they get to isel. llvm-svn: 150363
* Recommit r150328. Previous test failures should be fixed by r150360.Craig Topper2012-02-132-124/+37
| | | | llvm-svn: 150362
* Update CanXFormVExtractWithShuffleIntoLoad to ensure bitcasts of loads only ↵Craig Topper2012-02-131-1/+4
| | | | | | have one use. Matches DAGCombiner and prevents vector_shuffles from reaching isel. llvm-svn: 150360
* Revert r150328, "Remove more vector_shuffle patterns."NAKAMURA Takumi2012-02-132-11/+98
| | | | | | It caused 3 failures on pre-penryn and non-x86(generic) hosts. llvm-svn: 150357
* Fixed bug when custom lowering DEC64m on x86.Pete Cooper2012-02-131-0/+1
| | | | | | | | | If the DEC node had more than one user, it was doing this lowering but leaving the original DEC node around and so decrementing twice. Fixes PR11964. llvm-svn: 150356
* This patch addresses the problem of poor code generation for the zextNadav Rotem2012-02-121-14/+29
| | | | | | | | | | | | | | | | | | | v8i8 -> v8i32 on AVX machines. The codegen often scalarizes ANY_EXTEND nodes. The DAGCombiner has two optimizations that can mitigate the problem. First, if all of the operands of a BUILD_VECTOR node are extracted from an ZEXT/ANYEXT nodes, then it is possible to create a new simplified BUILD_VECTOR which uses UNDEFS/ZERO values to eliminate the scalar ZEXT/ANYEXT nodes. Second, another dag combine optimization lowers BUILD_VECTOR into a shuffle vector instruction. In the case of zext v8i8->v8i32 on AVX, a value in an XMM register is to be shuffled into a wide YMM register. This patch modifes the second optimization and allows the creation of shuffle vectors even when the newly generated vector and the original vector from which we extract the values are of different types. llvm-svn: 150340
* StringSwitchify the rest of Triple.cpp.Benjamin Kramer2012-02-121-62/+34
| | | | llvm-svn: 150332
* Switch a bunch of manual if-chains to use StringSwitch. Clean them up inChandler Carruth2012-02-121-170/+93
| | | | | | | | the process. Some of these are still a bit gross. Still, this cuts 80 some lines out of this ridiculous file. ;] llvm-svn: 150331
* Remove more vector_shuffle patterns.Craig Topper2012-02-122-98/+11
| | | | llvm-svn: 150328
* Expose the ELFObjectFile class directly in the Object/ELF.h header, similarlyEli Bendersky2012-02-122-1695/+413
| | | | | | | | | | to what's done for MachO and COFF. This allows advanced uses of the class to be implemented outside the Object library. In particular, the DyldELFObject subclass is now moved into its logical home - ExecutionEngine/RuntimeDyld. This patch was reviewed by Michael Spencer. llvm-svn: 150327
* Handle InvokeInst in EvaluateBlock. Don't try to support exceptions, it's justNick Lewycky2012-02-121-9/+14
| | | | | | that no optz'ns have run yet to convert invokes to calls. llvm-svn: 150326
* false is totally null!Nick Lewycky2012-02-121-1/+1
| | | | llvm-svn: 150324
* Remove redundant getAnalysis<> calls in GlobalOpt. Add a few Itanium ABI callsNick Lewycky2012-02-122-11/+13
| | | | | | to TargetLibraryInfo and use one of them in GlobalOpt. llvm-svn: 150323
* Pass TargetData and TargetLibraryInfo through to the constant folder. Fixes aNick Lewycky2012-02-121-25/+37
| | | | | | few fixme's when TLI was added. llvm-svn: 150322
* Remove more vector_shuffle patterns.Craig Topper2012-02-122-78/+4
| | | | llvm-svn: 150321
* Fix function name in comment to match actual name. Fix comments that are usingNick Lewycky2012-02-121-15/+15
| | | | | | doxy-style on local variables to not do so. Fix one 80-col violation. llvm-svn: 150320
* Don't traverse the PHI nodes twice. No functionality change!Nick Lewycky2012-02-121-7/+6
| | | | llvm-svn: 150319
* Remove more vector_shuffle patterns.Craig Topper2012-02-111-46/+4
| | | | llvm-svn: 150314
* Add support for implicit TLS model used with MS VC runtime.Anton Korobeynikov2012-02-119-4/+97
| | | | | | Patch by Kai Nacke! llvm-svn: 150307
* Don't mix declarations and code.Benjamin Kramer2012-02-112-8/+6
| | | | llvm-svn: 150305
* Make the EDis tables const.Benjamin Kramer2012-02-115-8/+8
| | | | llvm-svn: 150304
* Reuse the enum names from X86Desc in the X86Disassembler.Benjamin Kramer2012-02-115-15/+37
| | | | | | | This requires some gymnastics to make it available for C code. Remove the names from the disassembler tables, making them relocation free. llvm-svn: 150303
* [WIP] Initial code for module flags.Bill Wendling2012-02-112-5/+226
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Module flags are key-value pairs associated with the module. They include a 'behavior' value, indicating how module flags react when mergine two files. Normally, it's just the union of the two module flags. But if two module flags have the same key, then the resulting flags are dictated by the behaviors. Allowable behaviors are: Error Emits an error if two values disagree. Warning Emits a warning if two values disagree. Require Emits an error when the specified value is not present or doesn't have the specified value. It is an error for two (or more) llvm.module.flags with the same ID to have the Require behavior but different values. There may be multiple Require flags per ID. Override Uses the specified value if the two values disagree. It is an error for two (or more) llvm.module.flags with the same ID to have the Override behavior but different values. llvm-svn: 150300
* Remove some patterns for matching vector_shuffle instructions since ↵Craig Topper2012-02-112-78/+16
| | | | | | vector_shuffles should be custom lowered before isel. llvm-svn: 150299
* Add TargetPassConfig hooks for scheduling/bundling.Andrew Trick2012-02-111-3/+41
| | | | | | | | | In case the MachineScheduling pass I'm working on doesn't work well for another target, they can completely override it. This also adds a hook immediately after the RegAlloc pass to cleanup immediately after vregs go away. We may want to fold it into the postRA hook later. llvm-svn: 150298
* Fix shuffle lowering code to stop creating temporary DAG nodes to do shuffle ↵Craig Topper2012-02-111-36/+23
| | | | | | mask checks on. This seemed to be confusing things such that vector_shuffle ops to got through to iselection. This is another step towards removing the vector_shuffle handling patterns from isel. llvm-svn: 150296
* Allow Post-RA LICM to hoist reserved register reads.Jakob Stoklund Olesen2012-02-111-0/+11
| | | | | | | | When using register masks, registers like %rip are clobbered by the register mask. LICM should still be able to hoist instructions reading %rip from a loop containing calls. llvm-svn: 150288
* Handle register masks in local live range splitting.Jakob Stoklund Olesen2012-02-111-0/+25
| | | | | | | Again the goal is to produce identical assembly with register mask operands enabled. llvm-svn: 150287
* Don't read PreRegAlloc before it is initialized.Jakob Stoklund Olesen2012-02-111-6/+6
| | | | llvm-svn: 150286
* Revert r150222, as the clang driver now handles this properly.Jim Grosbach2012-02-101-11/+3
| | | | | | | Now that the clang driver passes the CPU and feature information to the backend when processing assembly files (150273), this isn't necessary. llvm-svn: 150274
* Add a static MachineOperand::clobbersPhysReg().Jakob Stoklund Olesen2012-02-101-7/+2
| | | | | | | | It can be necessary to detach a register mask pointer from its MachineOperand. This method is convenient for checking clobbered physregs on a detached bitmask pointer. llvm-svn: 150261
* Add register mask support to InterferenceCache.Jakob Stoklund Olesen2012-02-103-5/+42
| | | | | | | | | | | | | | | | This makes global live range splitting behave identically with and without register mask operands. This is not necessarily the best way of using register masks for live range splitting. It would be more efficient to first split global live ranges around calls (i.e., register masks), and reserve the fine grained per-physreg interference guidance for global live ranges that do not cross calls. For now the goal is to produce identical assembly when enabling register masks. llvm-svn: 150259
* Remove unused variable.Jakob Stoklund Olesen2012-02-101-2/+1
| | | | llvm-svn: 150258
* Make valgrind happy.Jason W Kim2012-02-101-2/+2
| | | | llvm-svn: 150251
* Update BBVectorize to use aliasesUnknownInst.Hal Finkel2012-02-101-9/+3
| | | | | | | | This allows BBVectorize to check the "unknown instruction" list in the alias sets. This is important to prevent instruction fusing from reordering function calls. Resolves PR11920. llvm-svn: 150250
* Have AliasSet::aliasesUnknownInst use pointer TBAA info when availableHal Finkel2012-02-101-1/+3
| | | | llvm-svn: 150249
* Fix PR11948: the result type of an icmp may be a vector of boolean -Duncan Sands2012-02-101-0/+5
| | | | | | don't assume it is a boolean. llvm-svn: 150247
* Put instruction names into an indexed string table on the side, removing a ↵Benjamin Kramer2012-02-102-2/+5
| | | | | | | | | pointer from MCInstrDesc. Make them accessible through MCInstrInfo. They are only used for debugging purposes so this doesn't have an impact on performance. X86MCTargetDesc.o goes from 630K to 461K on x86_64. llvm-svn: 150245
* comment grammarAndrew Trick2012-02-101-1/+1
| | | | llvm-svn: 150233
* unnecessary includeAndrew Trick2012-02-101-1/+0
| | | | llvm-svn: 150228
* PTX no longer needs to provide its own backend.Andrew Trick2012-02-102-255/+21
| | | | llvm-svn: 150227
* RegAlloc superpass: includes phi elimination, coalescing, and scheduling.Andrew Trick2012-02-1015-109/+147
| | | | | | | | | | | | | | | | Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. llvm-svn: 150226
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