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* [PDB] Don't ignore bucket 0 when writing the PDB string table.Zachary Turner2018-03-212-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | The hash table is a list of buckets, and the *value* stored in the bucket cannot be 0 since that is reserved. However, the code here was incorrectly skipping over the 0'th bucket entirely. The 0'th bucket is perfectly fine, just none of these buckets can contain the value 0. As a result, whenever there was a string where hash(S) % Size was equal to 0, we would write the value in the next bucket instead. We never caught this in our tests due to *another* bug, which is that we would iterate the entire list of buckets looking for the value, only using the hash value as a starting point. However, the real algorithm stops when it finds 0 in a bucket since it takes that to mean "the item is not in the hash table". The unit test is updated to carefully construct a set of hash values that will cause one item to hash to 0 mod bucket count, and the reader is also updated to return an error indicating that the item is not found when it encounters a 0 bucket. llvm-svn: 328162
* [NVPTX] Make tensor shape part of WMMA intrinsic's name.Artem Belevich2018-03-212-122/+172
| | | | | | | | | | This is needed for the upcoming implementation of the new 8x32x16 and 32x8x16 variants of WMMA instructions introduced in CUDA 9.1. Differential Revision: https://reviews.llvm.org/D44719 llvm-svn: 328158
* [PDB] Remove unused private variable, re-applying r327900 after relanding ↵Reid Kleckner2018-03-212-7/+4
| | | | | | more natvis changes[4~ llvm-svn: 328156
* [WebAssembly] Really disable wasm register name matcherReid Kleckner2018-03-212-8/+5
| | | | | | | | The "ShouldEmitMatchRegisterName" bit wasn't taking effect because the WebAssembly target didn't point to the custom WebAssemblyAsmParser record. llvm-svn: 328155
* Handle abbr_offset with relocations.Rafael Espindola2018-03-212-6/+8
| | | | | | | | | This is mostly just plumbing to get a DWARFDataExtractor where we compute abbr_offset so we can use getRelocatedValue. This is part of PR36793. llvm-svn: 328154
* Revert r328119 "[InstCombine] add folds for xor-of-icmp signbit tests (PR36682)"Reid Kleckner2018-03-211-30/+0
| | | | | | | This asserts when compiling safe_numerics_unittest.cpp in Chromium with MSan. llvm-svn: 328145
* [InstSimplify] fp_binop X, NaN --> NaNSanjay Patel2018-03-211-10/+32
| | | | | | | | We propagate the existing NaN value when possible. Differential Revision: https://reviews.llvm.org/D44521 llvm-svn: 328140
* [X86] Rewrite getOperandBias in X86BaseInfo.h to be a little more structured ↵Craig Topper2018-03-211-23/+33
| | | | | | and update comments to be more clear about what it does. NFC llvm-svn: 328136
* Sink Analysis/ObjectUtil(canBeOmittedFromSymbolTable) into IR so it can be ↵David Blaikie2018-03-214-6/+21
| | | | | | legitimately be used by Object/IRSymtab llvm-svn: 328135
* [InstrProf] Support for external functions in text format.Mircea Trofin2018-03-213-19/+17
| | | | | | | | | | | | | | | | | | | | | | | Summary: External functions appearing as indirect call targets could not be found in the SymTab, and the value:counter record was represented, in the text format, using an empty string for the name. This would then cause a silent parsing error when reading. This CL: - adds explicit support for such functions - fixes the places where we would not propagate errors when reading - addresses a performance issue due to eager resorting of the SymTab. Reviewers: xur, eraman, davidxl Reviewed By: davidxl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D44717 llvm-svn: 328132
* Reapply Support layering fixes.David Blaikie2018-03-211-4/+6
| | | | | | | | | | | | | | | | | | | | Compiler.h is used by Demangle (which Support depends on) - so sink it into Demangle to avoid a circular dependency DataTypes.h is used by llvm-c (which Support depends on) - so sink it into llvm-c. DataTypes.h could probably be fixed the other way - making llvm-c depend on Support instead of Support depending on llvm-c - if anyone feels that's the better option, happy to work with them on that. I /think/ this'll address the layering issues that previous attempts to commit this have triggered in the Modules buildbot, but I haven't been able to reproduce that build so can't say for sure. If anyone's having trouble with this - it might be worth taking a look to see if there's a quick fix/something small I missed rather than revert, but no worries. llvm-svn: 328123
* [Hexagon] Generalize DAG mutation for function callsKrzysztof Parzyszek2018-03-211-18/+38
| | | | | | | | | Add barrier edges to check for any physical register. The previous code worked for the function return registers: r0/d0, v0/w0. Patch by Brendon Cahoon. llvm-svn: 328120
* [InstCombine] add folds for xor-of-icmp signbit tests (PR36682)Sanjay Patel2018-03-211-0/+30
| | | | | | | | | | | | This is part of solving: https://bugs.llvm.org/show_bug.cgi?id=36682 There's also a leftover improvement from the long-ago-closed: https://bugs.llvm.org/show_bug.cgi?id=5438 https://rise4fun.com/Alive/dC1 llvm-svn: 328119
* TableGen: Remove redundant loop in ListInit::resolveReferencesNicolai Haehnle2018-03-211-7/+2
| | | | | | | | | | | | | | | | Summary: Recursive lookups are handled by the Resolver, so the loop was purely a waste of runtime. Change-Id: I2bd23a68b478aea0bbac1a86ca7635adffa28688 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D44624 llvm-svn: 328118
* TableGen: Streamline how defs are instantiatedNicolai Haehnle2018-03-213-388/+177
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Instantiating def's and defm's needs to perform the following steps: - for defm's, clone multiclass def prototypes and subsitute template args - for def's and defm's, add subclass definitions, substituting template args - clone the record based on foreach loops and substitute loop iteration variables - override record variables based on the global 'let' stack - resolve the record name (this should be simple, but unfortunately it's not due to existing .td files relying on rather silly implementation details) - for def(m)s in multiclasses, add the unresolved record as a multiclass prototype - for top-level def(m)s, resolve all internal variable references and add them to the record keeper and any active defsets This change streamlines how we go through these steps, by having both def's and defm's feed into a single addDef() method that handles foreach, final resolve, and routing the record to the right place. This happens to make foreach inside of multiclasses work, as the new test case demonstrates. Previously, foreach inside multiclasses was not forbidden by the parser, but it was de facto broken. Another side effect is that the order of "instantiated from" notes in error messages is reversed, as the modified test case shows. This is arguably clearer, since the initial error message ends up pointing directly to whatever triggered the error, and subsequent notes will point to increasingly outer layers of multiclasses. This is consistent with how C++ compilers report nested #includes and nested template instantiations. Change-Id: Ica146d0db2bc133dd7ed88054371becf24320447 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D44478 llvm-svn: 328117
* [Hexagon] Eliminate subregisters from PHI nodes before pipeliningKrzysztof Parzyszek2018-03-211-39/+74
| | | | | | | | | | | | | | | | The pipeliner needs to remove instructions from the SlotIndexes structure when they are deleted. Otherwise, the SlotIndexes map has stale data, and an assert will occur when adding new instructions. This patch also changes the pipeliner to make the back-edge of a loop carried dependence 1 cycle. The 1 cycle latency is added to the anti-dependence that represents the back-edge. This changes eliminates a couple of hacks added to the pipeliner to handle the latency of the back-edge. It is needed to correctly pipeline the test case for the sub-register elimination pass. llvm-svn: 328113
* [WebAssembly] Suppress unused function warning for register name matcherReid Kleckner2018-03-211-0/+4
| | | | llvm-svn: 328112
* [X86][Haswell] Merge multiple InstrRW entries that map to the same ↵Simon Pilgrim2018-03-211-1990/+1524
| | | | | | | | SchedWriteRes group (NFCI) (PR35955) I've also merged some VEX/non-VEX instregex strings with a (V?) prefix or (Y?) ymm variant - there are still a lot more of these to do. llvm-svn: 328111
* [X86][SandyBridge] Merge more VEX/non-VEX instregex patterns (NFCI) (PR35955)Simon Pilgrim2018-03-211-637/+326
| | | | llvm-svn: 328110
* [RISCV] Codegen support for RV32F floating point comparison operationsAlex Bradbury2018-03-214-17/+70
| | | | | | | | | This patch also includes extensive tests targeted at select and br+fcmp IR inputs. A sequence of br+fcmp required support for FPR32 registers to be added to RISCVInstrInfo::storeRegToStackSlot and RISCVInstrInfo::loadRegFromStackSlot. llvm-svn: 328104
* [MemCpyOpt] Update to new API for memory intrinsic alignmentDaniel Neilson2018-03-211-25/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This change is part of step five in the series of changes to remove alignment argument from memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the MemCpyOpt pass to cease using: 1) The old getAlignment() API of MemoryIntrinsic in favour of getting source & dest specific alignments through the new API. 2) The old IRBuilder CreateMemCpy/CreateMemMove single-alignment APIs in favour of the new API that allows setting source and destination alignments independently. We also add a few tests to fill gaps in the testing of this pass. Steps: Step 1) Remove alignment parameter and create alignment parameter attributes for memcpy/memmove/memset. ( rL322965, rC322964, rL322963 ) Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing source and dest alignments. ( rL323597 ) Step 3) Update Clang to use the new IRBuilder API. ( rC323617 ) Step 4) Update Polly to use the new IRBuilder API. ( rL323618 ) Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API, and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment() and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273, rL324278, rL324384, rL324395, rL324402, rL324626, rL324642, rL324653, rL324654, rL324773, rL324774, rL324781, rL324784, rL324955, rL324960, rL325816, rL327398, rL327421 ) Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the MemIntrinsicInst::[get|set]Alignment() methods. Reference http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html llvm-svn: 328097
* Re-re-land: Teach CorrelatedValuePropagation to reduce the width of ↵Justin Lebar2018-03-211-0/+54
| | | | | | | | | | | | | | | udiv/urem instructions. Summary: If the operands of a udiv/urem can be proved to fit within a smaller power-of-two-sized type, reduce the width of the udiv/urem. Backed out for causing performance regressions. Re-landing because we've determined that these regressions were noise. Original Differential Revision: https://reviews.llvm.org/D44102 llvm-svn: 328096
* Fix build broken by r328090Pavel Labath2018-03-211-4/+4
| | | | | | | | | | | - constexpr is needed for out-of-class definition of the Type static member by some compilers - MSVC is confused by the initialization of the static constexpr char[] member when it happens in a template specialization. Explicitly specifying the length of the array seems to be enough to help it figure things out. llvm-svn: 328093
* [dwarf] Unify unknown dwarf enum formatting codePavel Labath2018-03-214-67/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: We have had at least three pieces of code (in DWARFAbbreviationDeclaration, DWARFAcceleratorTable and DWARFDie) that have hand-rolled support for dumping unknown dwarf enum values. While not terrible, they are a bit distracting and enable small differences to creep in (Unknown_ffff vs. Unknown_0xffff). I ended up needing to add a fourth place (DWARFVerifier), so it seems it would be a good time to centralize. This patch creates an alternative to the XXXString dumping functions in the BinaryFormat library, which formats an unknown value as DW_TYPE_unknown_1234, instead of just an empty string. It is based on the formatv function, as that allows us to avoid materializing the string for unknown values (and because this way I don't have to invent a name for the new functions :P). In this patch I add formatters for dwarf attributes, forms, tags, and index attributes as these are the ones in use currently, but adding other enums is straight-forward. Reviewers: dblaikie, JDevlieghere, aprantl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D44570 llvm-svn: 328090
* Revert layering changesJonas Devlieghere2018-03-211-6/+4
| | | | | | | | | | | | This reverts: r328072 "Move Compiler.h from Support to Demangler to fix layering." r328073 "Fix the actual user of DataTypes.h in llvm-c to avoid the circular dependency" Failing bots: http://green.lab.llvm.org/green/job/clang-stage2-coverage-R/ http://green.lab.llvm.org/green/job/clang-stage2-configure-Rlto/ llvm-svn: 328085
* [SelectionDAG] Support multiple dangling debug info for one valueBjorn Pettersson2018-03-212-50/+50
| | | | | | | | | | | | | | | | | | | | | Summary: When building the selection DAG we sometimes need to postpone the handling of a dbg.value until the value it should refer to is created. This is done by using the DanglingDebugInfoMap. In the past this map has been limited to hold one dangling dbg.value per value. This patch removes that restriction. Reviewers: aprantl, rnk, probinson, vsk Reviewed By: aprantl Subscribers: Ka-Ka, llvm-commits, JDevlieghere Tags: #debug-info Differential Revision: https://reviews.llvm.org/D44610 llvm-svn: 328084
* [X86][Broadwell] Merge multiple InstrRW entries that map to the same ↵Craig Topper2018-03-211-1996/+1965
| | | | | | SchedWriteRes group (NFCI) (PR35955) llvm-svn: 328076
* Move Compiler.h from Support to Demangler to fix layering.David Blaikie2018-03-211-4/+6
| | | | | | | | | | | | Support depends on Demangle (Support/Unix/Signals.inc), so Demangle including Support/Compiler.h created a circular dependency. Leave a forwarding shim of Compiler.h because it makes more sense for users (a deeper fix might involve splitting Support into lower and upper Support - but that also sounds a bit weird/awkward) than thinking about the dependency on the Demangler. llvm-svn: 328072
* [X86] Fix the SchedRW for XOP vpcom register form instructions to not be ↵Craig Topper2018-03-211-2/+2
| | | | | | marked as loads. llvm-svn: 328071
* [X86] Change PMULLD to 10 cycles on Skylake per Agner's tables and ↵Craig Topper2018-03-202-18/+54
| | | | | | | | | | llvm-exegesis. Also restrict to port 0 and 1 for SkylakeClient. It looks like the scheduler models don't account for client not having a full vector ALU on port 5 like server. Fixes PR36808. llvm-svn: 328061
* [MustExecute] Shwo the effect of using full loop info variantPhilip Reames2018-03-201-5/+7
| | | | | | | | Most basic possible test for the logic used by LICM. Also contains a speculative build fix for compiles which complain about a definition of a stuct K; followed by a declaration as class K; llvm-svn: 328058
* [WebAssembly] Update torture compile test expectationsDerek Schuff2018-03-201-6/+0
| | | | | | The tests compile after r328049 llvm-svn: 328057
* [MustExecute] Move isGuaranteedToExecute and related rourtines to AnalysisPhilip Reames2018-03-202-133/+136
| | | | | | Next step is to actually merge the implementations and get both implementations tested through the new printer. llvm-svn: 328055
* [WebAssembly] Strip threadlocal attribute from globals in single thread modeDerek Schuff2018-03-201-2/+20
| | | | | | | | | The default thread model for wasm is single, and in this mode thread-local global variables can be lowered identically to non-thread-local variables. Differential Revision: https://reviews.llvm.org/D44703 llvm-svn: 328049
* [X86] Drop unnecessary InstRW overrides for WriteFMASimon Pilgrim2018-03-201-24/+0
| | | | | | As noticed on D44687, these already match the WriteFMA def so can be removed. llvm-svn: 328045
* [ReachingDefAnalysis] Fix what I assume to be a typo ↵Craig Topper2018-03-201-4/+4
| | | | | | | | ReachingDedDefaultVal->ReachingDefDefaultVal. Unless Ded has some many I don't know about. llvm-svn: 328043
* [ObjCARC] Add funclet token to ARC markerShoaib Meenai2018-03-201-8/+27
| | | | | | | | | | | | | | | The inline assembly generated for the ARC autorelease elision marker must have a funclet token if it's emitted inside a funclet, otherwise the inline assembly (and all subsequent code in the funclet) will be marked unreachable by WinEHPrepare. Note that this only applies for the non-O0 case, since at O0, clang emits the autorelease elision marker itself rather than deferring to the backend. The fix for clang is handled in a separate change. Differential Revision: https://reviews.llvm.org/D44641 llvm-svn: 328042
* [X86] Don't use the MSVC stack protector names on mingwMartin Storsjo2018-03-201-3/+8
| | | | | | | | | | | Mingw uses the same stack protector functions as GCC provides on other platforms as well. Patch by Valentin Churavy! Differential Revision: https://reviews.llvm.org/D27296 llvm-svn: 328039
* [DEBUGINFO] Add -no-dwarf-debug-ranges option.Alexey Bataev2018-03-203-4/+27
| | | | | | | | | | | | | | Summary: Added option -no-dwarf-debug-ranges option to disable emission of .debug_ranges section. Reviewers: probinson, echristo Subscribers: aprantl, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D44384 llvm-svn: 328030
* [WebAssembly] Added initial AsmParser implementation.Derek Schuff2018-03-209-7/+612
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It uses the MC framework and the tablegen matcher to do the heavy lifting. Can handle both explicit and implicit locals (-disable-wasm-explicit-locals). Comes with a small regression test. This is a first basic implementation that can parse most llvm .s output and round-trips most instructions succesfully, but in order to keep the commit small, does not address all issues. There are a fair number of mismatches between what MC / assembly matcher think a "CPU" should look like and what WASM provides, some already have workarounds in this commit (e.g. the way it deals with register operands) and some that require further work. Some of that further work may involve changing what the Disassembler outputs (and what s2wasm parses), so are probably best left to followups. Some known things missing: - Many directives are ignored and not emitted. - Vararg calls are parsed but extra args not emitted. - Loop signatures are likely incorrect. - $drop= is not emitted. - Disassembler does not output SIMD types correctly, so assembler can't test them. Patch by Wouter van Oortmerssen Differential Revision: https://reviews.llvm.org/D44329 llvm-svn: 328028
* [AArch64] Adjust the cost model for Exynos M3Evandro Menezes2018-03-201-1/+1
| | | | | | Fix typo in the number of integer dividers. llvm-svn: 328027
* [Hexagon] Add heuristic to exclude critical path cost for schedulingKrzysztof Parzyszek2018-03-202-177/+79
| | | | | | Patch by Brendon Cahoon. llvm-svn: 328022
* [Hexagon] Fix fall-through warnings in HexagonMCDuplexInfo.cppKrzysztof Parzyszek2018-03-201-4/+4
| | | | llvm-svn: 328021
* [MC,X86] Cleanup some X86 parser functions to use MCParser helpers. NFCI.Nirav Dave2018-03-201-45/+22
| | | | llvm-svn: 328019
* [PowerPC][LegalizeFloatTypes] Move the PPC hacks for (i32 ↵Craig Topper2018-03-202-59/+44
| | | | | | | | | | | | | | fp_to_sint/fp_to_uint (ppcf128 X)) out of LegalizeFloatTypes and into PPC specific code I'm not entirely sure these hacks are still needed. If you remove the hacks completely, the name of the library call that gets generated doesn't match the grep the test previously had. So the test wasn't really checking anything. If the hack is still needed it belongs in PPC specific code. I believe the FP_TO_SINT code here is the only place in the tree where a FP_ROUND_INREG node is created today. And I don't think its even being used correctly because the legalization returned a BUILD_PAIR with the same value twice. That doesn't seem right to me. By moving the code entirely to PPC we can avoid creating the FP_ROUND_INREG at all. I replaced the grep in the existing test with full checks generated by hacking update_llc_test_check.py to support ppc32 just long enough to generate it. Differential Revision: https://reviews.llvm.org/D44061 llvm-svn: 328017
* [X86] Add phony registers for high halves of regs with low halvesKrzysztof Parzyszek2018-03-201-18/+36
| | | | | | | | | | | | | | | | | Registers E[A-D]X, E[SD]I, E[BS]P, and EIP have 16-bit subregisters that cover the low halves of these registers. This change adds artificial subregisters for the high halves in order to differentiate (in terms of register units) between the 32- and the low 16-bit registers. This patch contains parts that aim to preserve the calculated register pressure. This is in order to preserve the current codegen (minimize the impact of this patch). The approach of having artificial subregisters could be used to fix PR23423, but the pressure calculation would need to be changed. Differential Revision: https://reviews.llvm.org/D43353 llvm-svn: 328016
* [MustExecute] Use the annotation style printerPhilip Reames2018-03-201-33/+54
| | | | | | | As suggested in the original review (https://reviews.llvm.org/D44524), use an annotation style printer instead. Note: The switch from -analyze to -disable-output in tests was driven by the fact that seems to be the idiomatic style used in annoation passes. I tried to keep both working, but the old style pass API for printers really doesn't make this easy. It invokes (runOnFunction, print(Module)) repeatedly. I decided the extra state wasn't worth it given the old pass manager is going away soonish anyway. llvm-svn: 328015
* Revert "Resubmit "Support embedding natvis files in PDBs.""Zachary Turner2018-03-208-186/+32
| | | | | | | | This is still failing on a different bot this time due to some issue related to hashing absolute paths. Reverting until I can figure it out. llvm-svn: 328014
* [NVPTX] Make tensor load/store intrinsics overloaded.Artem Belevich2018-03-202-91/+115
| | | | | | | | | | | | | | | | This way we can support address-space specific variants without explicitly encoding the space in the name of the intrinsic. Less intrinsics to deal with -> less boilerplate. Added a bit of tablegen magic to match/replace an intrinsics with a pointer argument in particular address space with the space-specific instruction variant. Updated tests to use non-default address spaces. Differential Revision: https://reviews.llvm.org/D43268 llvm-svn: 328006
* Add an analysis printer for must execute reasoningPhilip Reames2018-03-203-0/+104
| | | | | | | | | | | | Many of our loop passes make use of so called "must execute" or "guaranteed to execute" facts to prove the legality of code motion. The basic notion is that we know (by assumption) an instruction didn't fault at it's original location, so if the location we move it to is strictly post dominated by the original, then we can't have introduced a new fault. At the moment, the testing for this logic is somewhat adhoc and done mostly through LICM. Since I'm working on that code, I want to improve the testing. This patch is the first step in that direction. It doesn't actually test the variant used by the loop passes - I need to move that to the Analysis library first - but instead exercises an alternate implementation used by SCEV. (I plan on merging both implementations.) Note: I'll be replacing the printing logic within this with an annotation based version in the near future. Anna suggested this in review, and it seems like a strictly better format. Differential Revision: https://reviews.llvm.org/D44524 llvm-svn: 328004
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