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* Constrain register classes instead of emitting copies.Jakob Stoklund Olesen2011-09-221-3/+5
| | | | | | | | | | | Sometimes register class constraints are trivial, like GR32->GR32_NOSP, or GPR->rGPR. Teach InstrEmitter to simply constrain the virtual register instead of emitting a copy in these cases. Normally, these copies are handled by the coalescer. This saves some coalescer work. llvm-svn: 140340
* Add a MinNumRegs argument to MRI::constrainRegClass().Jakob Stoklund Olesen2011-09-221-4/+6
| | | | | | | | | | | The function will refuse to use a register class with fewer registers than MinNumRegs. This can be used by clients to avoid accidentally increase register pressure too much. The default value of MinNumRegs=0 doesn't affect how constrainRegClass() works. llvm-svn: 140339
* Synthesize SSE3/AVX 128 bit horizontal add/sub instructions fromDuncan Sands2011-09-224-22/+240
| | | | | | | floating point add/sub of appropriate shuffle vectors. Does not synthesize the 256 bit AVX versions because they work differently. llvm-svn: 140332
* PR10987: add a missed safety check to isSafePHIToSpeculate in scalarrepl.Eli Friedman2011-09-221-7/+11
| | | | llvm-svn: 140327
* Print parentheses in next line.Akira Hatanaka2011-09-221-2/+4
| | | | llvm-svn: 140325
* Change subreg index of AFPR64 from sub_fpeven to sub_32 per Jakob's comment.Akira Hatanaka2011-09-221-1/+1
| | | | llvm-svn: 140324
* Define a new sub-register index sub_32 for accessing the 32-bit sub-register ofAkira Hatanaka2011-09-221-4/+5
| | | | | | | a 64-bit integer register. Move the subreg index definitions to the beginning of the file. llvm-svn: 140319
* Use the C personality function instead of the C++ personality function.Bill Wendling2011-09-221-3/+1
| | | | llvm-svn: 140318
* Print three closing parentheses when Kind is either VK_Mips_GPOFF_HI or Akira Hatanaka2011-09-221-2/+2
| | | | | | VK_Mips_GPOFF_LO. llvm-svn: 140316
* Add F31 to the set of callee-saved registers.Akira Hatanaka2011-09-221-1/+1
| | | | llvm-svn: 140315
* Fix typo.Akira Hatanaka2011-09-221-2/+2
| | | | llvm-svn: 140313
* PTX: Remove physical register defsJustin Holewinski2011-09-225-543/+11
| | | | llvm-svn: 140310
* PTX: Use .param space for device function return values on SM 2.0+, and attemptJustin Holewinski2011-09-228-105/+351
| | | | | | to fix up parameter passing on SM < 2.0 llvm-svn: 140309
* PTX: Fix style issuesJustin Holewinski2011-09-222-22/+22
| | | | llvm-svn: 140308
* PTX: Fixup codegen to handle emission of virtual registers.Justin Holewinski2011-09-224-17/+128
| | | | llvm-svn: 140307
* PTX: Customize codegen passes in backendJustin Holewinski2011-09-222-0/+314
| | | | llvm-svn: 140306
* PTX: Add new PTX-specific register allocator that keeps virtual registersJustin Holewinski2011-09-223-0/+61
| | | | | | | | instead of allocating physical registers. This is part of a work-in-progress overhaul of the PTX register allocation scheme. llvm-svn: 140305
* Fix register printing in disassembling of push/pop of segment registers and ↵Craig Topper2011-09-221-38/+38
| | | | | | in/out in Intel syntax mode. Fixes PR10960 llvm-svn: 140299
* Add definition of 64-bit floating registers used for Mips64.Akira Hatanaka2011-09-221-0/+40
| | | | llvm-svn: 140297
* The SSE version differences for fmin/fmax are more involved than I thought.Benjamin Kramer2011-09-221-3/+4
| | | | | | | | | - x87: no min or max. - SSE1: min/max for single precision scalars and vectors. - SSE2: min/max for single and double precision scalars and vectors. - AVX: as SSE2, but also supports the wider ymm vectors. (this is covered by the isTypeLegal check) llvm-svn: 140296
* Add enums and functions for symbols Mips64 uses.Akira Hatanaka2011-09-225-2/+29
| | | | llvm-svn: 140295
* X86: Don't form min/max nodes if the target is missing SSE.Benjamin Kramer2011-09-221-1/+2
| | | | llvm-svn: 140294
* Mips64 aligns stack on 16-byte boundary.Akira Hatanaka2011-09-221-1/+2
| | | | llvm-svn: 140292
* Remove unnecessary condition check.Akira Hatanaka2011-09-221-1/+0
| | | | llvm-svn: 140291
* Turns out that Thumb2 ADR doesn't need special printing like LDR does. Fix ↵Owen Anderson2011-09-213-14/+0
| | | | | | other test failures I caused. llvm-svn: 140284
* Print out immediate offset versions of PC-relative load/store instructions ↵Owen Anderson2011-09-213-0/+27
| | | | | | as [pc, #123] rather than simply #123. llvm-svn: 140283
* Do not unnecessarily use AT_specification DIE because it does not add any value.Devang Patel2011-09-211-1/+1
| | | | | | Few weeks ago, llvm completely inverted the debug info graph. Earlier each debug info node used to keep track of its compile unit, now compile unit keeps track of important nodes. One impact of this change is that the global variable's do not have any context, which should be checked before deciding to use AT_specification DIE. llvm-svn: 140282
* Fix for DbgInfoPrinter.cpp:174:12: warning: ‘LineNo’ may be used ↵Galina Kistanova2011-09-211-1/+1
| | | | | | uninitialized in this function. llvm-svn: 140281
* The last verification check for the new EH model.Bill Wendling2011-09-211-0/+6
| | | | | | This makes sure that the unwind destination of an invoke is a landing pad. llvm-svn: 140280
* Attempt to update the shadow stack GC pass to the new EH model.Bill Wendling2011-09-211-5/+17
| | | | | | | This inserts a cleanup landingpad instruction and a resume to mimic the old unwind instruction. llvm-svn: 140277
* X86Disassembler: if verbose logging is going to nulls(), disable logging ↵Benjamin Kramer2011-09-211-1/+5
| | | | | | | | completely. Otherwise we'll spend a ridiculous amount of time pretty printing debug output and then discarding it. llvm-svn: 140276
* Tidy up. Whitepsace.Jim Grosbach2011-09-211-3/+3
| | | | llvm-svn: 140275
* Fix some simple copy-paste errors in MBlaze ASM Parser and Makefile.Wesley Peck2011-09-212-2/+2
| | | | | | patch contributed by Jia Liu! llvm-svn: 140273
* These do not need to be conditional on the presence of CommentStream, as ↵Owen Anderson2011-09-215-19/+19
| | | | | | they have a fallback path now. llvm-svn: 140267
* Undo a change made in r140254.Akira Hatanaka2011-09-211-4/+4
| | | | | | MipsArchVersion needs to be initialized to Mips32. llvm-svn: 140261
* DWARF: avoid unnecessary map lookups.Benjamin Kramer2011-09-211-6/+5
| | | | llvm-svn: 140260
* fix commentNadav Rotem2011-09-211-1/+1
| | | | llvm-svn: 140258
* MipsArchVersion does not need to be in the initialization list and MipsABIAkira Hatanaka2011-09-211-1/+1
| | | | | | should be initialized to UnknownABI. llvm-svn: 140254
* [VECTOR-SELECT] Address one of the bugs in pr10902.Nadav Rotem2011-09-211-0/+2
| | | | | | | Vector SetCC result types need to be type-legalized. This code worked before because scalar result types are known to be legal. llvm-svn: 140249
* Insert a sanity check on the combining of x86 truncing-store nodes. This ↵Nadav Rotem2011-09-211-0/+3
| | | | | | comes to replace the problematic check that was removed in r139995. llvm-svn: 140246
* Change:Richard Trieu2011-09-215-17/+17
| | | | | | | | | | | | assert(!"error message"); To: assert(0 && "error message"); which is more consistant across the code base. llvm-svn: 140234
* Add a base class for Mips TargetMachines and add Mips64 TargetMachines. Akira Hatanaka2011-09-217-7/+92
| | | | llvm-svn: 140233
* Set ABI if it hasn't been set on the command line.Akira Hatanaka2011-09-212-1/+10
| | | | | | Check if architecture & ABI combination is valid. llvm-svn: 140230
* Fix typo.Akira Hatanaka2011-09-211-2/+2
| | | | llvm-svn: 140229
* Lower ARM adds/subs to add/sub after adding optional CPSR operand.Andrew Trick2011-09-219-148/+152
| | | | | | | | | | | | | This is still a hack until we can teach tblgen to generate the optional CPSR operand rather than an implicit CPSR def. But the strangeness is now limited to the selection DAG. ADD/SUB MI's no longer have implicit CPSR defs, nor do we allow flag setting variants of these opcodes in machine code. There are several corner cases to consider, and getting one wrong would previously lead to nasty miscompilation. It's not the first time I've debugged one, so this time I added enough verification to ensure it won't happen again. llvm-svn: 140228
* whitespaceAndrew Trick2011-09-211-4/+4
| | | | llvm-svn: 140227
* In the disassembler C API, be careful not to confuse the comment streamer ↵Owen Anderson2011-09-219-24/+28
| | | | | | that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on. llvm-svn: 140217
* Change the names of functions isMips* to hasMips*.Akira Hatanaka2011-09-204-15/+15
| | | | llvm-svn: 140214
* Make sure IPSCCP never marks a tracked call as overdefined in ↵Eli Friedman2011-09-201-9/+35
| | | | | | | | SCCPSolver::ResolvedUndefsIn. If we do, we can end up in a situation where a function is resolved to return a constant, but the caller is marked overdefined, which confuses the code later. <rdar://problem/9956541> (again). llvm-svn: 140210
* Add a DAGCombine for subvector extracts to remove useless chains ofBruno Cardoso Lopes2011-09-201-0/+32
| | | | | | | subvector inserts and extracts. Initial patch by Rackover, Zvi with some tweak done by me. llvm-svn: 140204
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