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* [DAGCombine] Add SimplifyDemandedBits helper that handles demanded elts mask ↵Simon Pilgrim2019-04-171-4/+13
| | | | | | | | as well The other SimplifyDemandedBits helpers become wrappers to this new demanded elts variant. llvm-svn: 358585
* [Support] Add LEB128 support to BinaryStreamReader/Writer.Lang Hames2019-04-172-1/+45
| | | | | | | | | | | | | | | | | | | Summary: This patch adds support for ULEB128 and SLEB128 encoding and decoding to BinaryStreamWriter and BinaryStreamReader respectively. Support for ULEB128/SLEB128 will be used for eh-frame parsing in the JITLink library currently under development (see https://reviews.llvm.org/D58704). Reviewers: zturner, dblaikie Subscribers: kristina, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60810 llvm-svn: 358584
* [ScheduleDAGRRList] Recompute topological ordering on demand.Florian Hahn2019-04-172-24/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently there is a single point in ScheduleDAGRRList, where we actually query the topological order (besides init code). Currently we are recomputing the order after adding a node (which does not have predecessors) and then we add predecessors edge-by-edge. We can avoid adding edges one-by-one after we added a new node. In that case, we can just rebuild the order from scratch after adding the edges to the DAG and avoid all the updates to the ordering. Also, we can delay updating the DAG until we query the DAG, if we keep a list of added edges. Depending on the number of updates, we can either apply them when needed or recompute the order from scratch. This brings down the geomean compile time for of CTMark with -O1 down 0.3% on X86, with no regressions. Reviewers: MatzeB, atrick, efriedma, niravd, paquette Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D60125 llvm-svn: 358583
* [AMDGPU][MC] Corrected parsing of registersDmitry Preobrazhensky2019-04-171-27/+126
| | | | | | | | | | See bug 41280: https://bugs.llvm.org/show_bug.cgi?id=41280 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D60621 llvm-svn: 358581
* [AMDGPU] Flag new raw/struct atomic ops as source of divergenceTim Renouf2019-04-171-0/+22
| | | | | | | Differential Revision: https://reviews.llvm.org/D60731 Change-Id: I821d93dec8b9cdd247b8172d92fb5e15340a9e7d llvm-svn: 358579
* [LLVM-C] Add DIFile Field AccesssorsRobert Widmann2019-04-171-0/+25
| | | | | | | | | | | | | | | | | | | Summary: Add accessors for the file, directory, source file name (curiously, an `Optional` value?), of a DIFile. This is intended to replace the LLVMValueRef-based accessors used in D52239 Reviewers: whitequark, jberdine, deadalnix Reviewed By: whitequark, jberdine Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60489 llvm-svn: 358577
* [CostModel][X86] Add bool anyof/allof reduction costsSimon Pilgrim2019-04-171-0/+42
| | | | | | | | On pre-AVX512 targets we can use MOVMSK to extract reduced boolean results. This is properly optimized, annoyingly AVX512 isn't and produces code that is almost as bad as the (unchanged) costs suggest...... Differential Revision: https://reviews.llvm.org/D60403 llvm-svn: 358574
* [DWARF] llvm::Error -> Error. NFCFangrui Song2019-04-171-4/+5
| | | | | | The unqualified name is more common and is used in the file as well. llvm-svn: 358567
* Change some llvm::{lower,upper}_bound to llvm::bsearch. NFCFangrui Song2019-04-174-17/+10
| | | | llvm-svn: 358564
* [CVP] processOverflowIntrinsic(): don't crash if constant-holding happenedRoman Lebedev2019-04-171-4/+7
| | | | | | | As reported by Mikael Holmén in post-commit review in https://reviews.llvm.org/D60791#1469765 llvm-svn: 358559
* [DWARF] Pass ReferenceToDIEOffsets elements by referenceFangrui Song2019-04-171-3/+3
| | | | llvm-svn: 358558
* [X86] In CopyToFromAsymmetricReg, use VR128 instead of FR32 instructions for ↵Craig Topper2019-04-171-12/+12
| | | | | | | | | | | | | GR32<->XMM register copies. We have two versions of some instructions, VR128 versions and FR32 versions that are marked as CodeGenOnly. This change switches to using the VR128 versions for these copies. It's after register allocation so the class size no longer matters. This matches how GR64 works. llvm-svn: 358555
* Revert "Add basic loop fusion pass." Per request.Eric Christopher2019-04-175-1216/+0
| | | | | | This reverts commit r358543/ab70da07286e618016e78247e4a24fcb84077fda. llvm-svn: 358553
* Revert "Temporarily Revert "Add basic loop fusion pass.""Eric Christopher2019-04-175-0/+1216
| | | | | | | | The reversion apparently deleted the test/Transforms directory. Will be re-reverting again. llvm-svn: 358552
* Remove the run-slp-after-loop-vectorization option.Eric Christopher2019-04-171-12/+3
| | | | | | | It's been on by default for 4 years and cleans up the pass hierarchy. llvm-svn: 358548
* Temporarily Revert "Add basic loop fusion pass."Eric Christopher2019-04-175-1216/+0
| | | | | | | | As it's causing some bot failures (and per request from kbarton). This reverts commit r358543/ab70da07286e618016e78247e4a24fcb84077fda. llvm-svn: 358546
* Add basic loop fusion pass.Kit Barton2019-04-175-0/+1216
| | | | | | | | | | | | | | | | | | | This patch adds a basic loop fusion pass. It will fuse loops that conform to the following 4 conditions: 1. Adjacent (no code between them) 2. Control flow equivalent (if one loop executes, the other loop executes) 3. Identical bounds (both loops iterate the same number of iterations) 4. No negative distance dependencies between the loop bodies. The pass does not make any changes to the IR to create opportunities for fusion. Instead, it checks if the necessary conditions are met and if so it fuses two loops together. The pass has not been added to the pass pipeline yet, and thus is not enabled by default. It can be run stand alone using the -loop-fusion option. Phabricator: https://reviews.llvm.org/D55851 llvm-svn: 358543
* [LLVM-C] Add Accessors For Global Variable Metadata PropertiesRobert Widmann2019-04-161-0/+25
| | | | | | | | | | | | | | | | Summary: Metadata for a global variable is really a (GlobalVariable, Expression) tuple. Allow access to these, then allow retrieving the file, scope, and line for a DIVariable, whether global or local. This should be the last of the accessors required for uniform access to location and file information metadata. Reviewers: jberdine, whitequark, deadalnix Reviewed By: jberdine, whitequark Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60725 llvm-svn: 358532
* Fix a typo in comments. [NFC]Ali Tamur2019-04-161-1/+1
| | | | llvm-svn: 358531
* [NVPTXAsmPrinter] clean up dead code. NFCNick Desaulniers2019-04-162-45/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The printOperand function takes a default parameter, for which there are zero call sites that explicitly pass such a parameter. As such, there is no case to support. This means that the method printVecModifiedImmediate is purly dead code, and can be removed. The eventual goal for some of these AsmPrinter refactoring is to have printOperand be a virtual method; making it easier to print operands from the base class for more generic Asm printing. It will help if all printOperand methods have the same function signature (ie. no Modifier argument when not needed). Reviewers: echristo, tra Reviewed By: echristo Subscribers: jholewinski, hiraditya, llvm-commits, craig.topper, srhines Tags: #llvm Differential Revision: https://reviews.llvm.org/D60727 llvm-svn: 358527
* [TargetLowering] Rename preferShiftsToClearExtremeBits and ↵Simon Pilgrim2019-04-167-13/+12
| | | | | | | | | | | | shouldFoldShiftPairToMask (PR41359) As discussed on PR41359, this patch renames the pair of shift-mask target feature functions to make their purposes more obvious. shouldFoldShiftPairToMask -> shouldFoldConstantShiftPairToMask preferShiftsToClearExtremeBits -> shouldFoldMaskToVariableShiftPair llvm-svn: 358526
* [EarlyCSE] detect equivalence of selects with inverse conditions and ↵Sanjay Patel2019-04-161-2/+59
| | | | | | | | | | | | | | | | | | commuted operands (PR41101) This is 1 of the problems discussed in the post-commit thread for: rL355741 / http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20190311/635516.html and filed as: https://bugs.llvm.org/show_bug.cgi?id=41101 Instcombine tries to canonicalize some of these cases (and there's room for improvement there independently of this patch), but it can't always do that because of extra uses. So we need to recognize these commuted operand patterns here in EarlyCSE. This is similar to how we detect commuted compares and commuted min/max/abs. Differential Revision: https://reviews.llvm.org/D60723 llvm-svn: 358523
* Time profiler: optimize json output timeAnton Afanasyev2019-04-161-0/+5
| | | | | | | | | | | | | | | | | | Summary: Use llvm::json::Array.reserve() to optimize json output time. Here is motivation: https://reviews.llvm.org/D60609#1468941. In short: for the json array with ~32K entries, pushing back each entry takes ~4% of whole time compared to the method of preliminary memory reservation: (3995-3845)/3995 = 3.75%. Reviewers: lebedev.ri Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60792 llvm-svn: 358522
* [CVP] Simplify umulo and smulo that cannot overflowNikita Popov2019-04-161-6/+1
| | | | | | | | | | | If a umul.with.overflow or smul.with.overflow operation cannot overflow, simplify it to a simple mul nuw / mul nsw. After the refactoring in D60668 this is just a matter of removing an explicit check against multiplications. Differential Revision: https://reviews.llvm.org/D60791 llvm-svn: 358521
* [SLP] Refactoring of the operand reordering code.Simon Pilgrim2019-04-161-171/+463
| | | | | | | | | | | | | | This is a refactoring patch which should have all the functionality of the current code. Its goal is twofold: i. Cleanup and simplify the reordering code, and ii. Generalize reordering so that it will work for an arbitrary number of operands, not just 2. This is the second patch in a series of patches that will enable operand reordering across chains of operations. An example of this was presented in EuroLLVM'18 https://www.youtube.com/watch?v=gIEn34LvyNo . Committed on behalf of @vporpo (Vasileios Porpodas) Differential Revision: https://reviews.llvm.org/D59973 llvm-svn: 358519
* [X86][AVX] X86ISD::PERMV/PERMV3 node types can never fold index opsSimon Pilgrim2019-04-161-5/+13
| | | | | | | | | | Improves codegen demonstrated by D60512 - instructions represented by X86ISD::PERMV/PERMV3 can never memory fold the operand used for their index register. This patch updates the 'isUseOfShuffle' helper into the more capable 'isFoldableUseOfShuffle' that recognises that the op is used for a X86ISD::PERMV/PERMV3 index mask and can't be folded - allowing us to use broadcast/subvector-broadcast ops to reduce the size of the mask constant pool data. Differential Revision: https://reviews.llvm.org/D60562 llvm-svn: 358516
* [InstCombine] Prune fshl/fshr with masked operandsNikita Popov2019-04-161-0/+4
| | | | | | | | | | | | | | | | If a constant shift amount is used, then only some of the LHS/RHS operand bits are demanded and we may be able to simplify based on that. InstCombineSimplifyDemanded already had the necessary support for that, we just weren't calling it with fshl/fshr as root. In particular, this allows us to relax some masked funnel shifts into simple shifts, as shown in the tests. Patch by Shawn Landden. Differential Revision: https://reviews.llvm.org/D60660 llvm-svn: 358515
* [IR] Add WithOverflowInst classNikita Popov2019-04-167-218/+117
| | | | | | | | | | | | | | This adds a WithOverflowInst class with a few helper methods to get the underlying binop, signedness and nowrap type and makes use of it where sensible. There will be two more uses in D60650/D60656. The refactorings are all NFC, though I left some TODOs where things could be improved. In particular we have two places where add/sub are handled but mul isn't. Differential Revision: https://reviews.llvm.org/D60668 llvm-svn: 358512
* [Hexagon] Remove indeterministic traversal orderKrzysztof Parzyszek2019-04-161-9/+8
| | | | | | Patch by Sergei Larin. llvm-svn: 358505
* [DAGCombiner] Add missing flag to addressing mode checkLuis Marques2019-04-161-0/+2
| | | | | | | | | | | | The checks in `canFoldInAddressingMode` tested for addressing modes that have a base register but didn't set the `HasBaseReg` flag to true (it's false by default). This patch fixes that. Although the omission of the flag was technically incorrect it had no known observable impact, so no tests were changed by this patch. Differential Revision: https://reviews.llvm.org/D60314 llvm-svn: 358502
* [RISCV] Custom lower SHL_PARTS, SRA_PARTS, SRL_PARTSLuis Marques2019-04-162-3/+108
| | | | | | | | | When not optimizing for minimum size (-Oz) we custom lower wide shifts (SHL_PARTS, SRA_PARTS, SRL_PARTS) instead of expanding to a libcall. Differential Revision: https://reviews.llvm.org/D59477 llvm-svn: 358498
* [llvm][Support] Provide interface to set thread prioritiesKadir Cetinkaya2019-04-162-0/+55
| | | | | | | | | | | | | | | | | | | Summary: We have a multi-platform thread priority setting function(last piece landed with D58683), I wanted to make this available to all llvm community, there seem to be other users of such functionality with portability fixmes: lib/Support/CrashRecoveryContext.cpp tools/clang/tools/libclang/CIndex.cpp Reviewers: gribozavr, ioeric Subscribers: krytarowski, jfb, kristina, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59130 llvm-svn: 358494
* llvm-undname: Consistently use "return nullptr" in functions returning pointersNico Weber2019-04-161-4/+4
| | | | llvm-svn: 358492
* llvm-undname: Fix nullptr deref on invalid structor names in template argsNico Weber2019-04-161-3/+4
| | | | | | | | | | | | Similar to r358421: A StructorIndentifierNode has a Class field which is read when printing it, but if the StructorIndentifierNode appears in a template argument then demangleFullyQualifiedSymbolName() which sets Class isn't called. Since StructorIndentifierNodes are always leaf names, we can just reject them as well. Found by oss-fuzz. llvm-svn: 358491
* Re-commit r357452: SimplifyCFG SinkCommonCodeFromPredecessors: Also sink ↵Hans Wennborg2019-04-161-14/+15
| | | | | | | | | | | | | | | | | | | function calls without used results (PR41259) The original commit caused false positives from AddressSanitizer's use-after-scope checks, which have now been fixed in r358478. > The code was previously checking that candidates for sinking had exactly > one use or were a store instruction (which can't have uses). This meant > we could sink call instructions only if they had a use. > > That limitation seemed a bit arbitrary, so this patch changes it to > "instruction has zero or one use" which seems more natural and removes > the need to special-case stores. > > Differential revision: https://reviews.llvm.org/D59936 llvm-svn: 358483
* Asan use-after-scope: don't poison allocas if there were untraced lifetime ↵Hans Wennborg2019-04-161-1/+14
| | | | | | | | | | | | | | intrinsics in the function (PR41481) If there are any intrinsics that cannot be traced back to an alloca, we might have missed the start of a variable's scope, leading to false error reports if the variable is poisoned at function entry. Instead, if there are some intrinsics that can't be traced, fail safe and don't poison the variables in that function. Differential revision: https://reviews.llvm.org/D60686 llvm-svn: 358478
* Use native llvm JSON library for time profiler outputAnton Afanasyev2019-04-161-37/+37
| | | | | | | | | | | | | | Summary: Replace plain json text output with llvm JSON library wrapper using. Reviewers: takuto.ikuta, lebedev.ri Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60609 llvm-svn: 358476
* [CodeExtractor] Add a few debug lines to understand why a region is not ↵Quentin Colombet2019-04-161-3/+8
| | | | | | | | | | | | | | | | | | extracted The CodeExtractor is not smart enough to compute which basic block is the entry of a region. Instead it relies on the order of the list of basic blocks that is handed to it and assumes that the entry is the first block in the list. Without the additional debug information, it is hard to understand why a valid region does not get extracted, because we would miss that the order of in the list just doesn't match what the CodeExtractor wants. NFC llvm-svn: 358471
* Reapply [Support] Fix recursive response file expansion guardShoaib Meenai2019-04-161-4/+6
| | | | | | | | | | | | | | | | | | | | | The test in the dependent revision has been fixed for Windows. Original commit message: Response file expansion limits the amount of expansion to prevent potential infinite recursion. However, the current logic assumes that any argument beginning with @ is a response file, which is not true for e.g. `-Xlinker -rpath -Xlinker @executable_path/../lib` on Darwin. Having too many of these non-response file arguments beginning with @ prevents actual response files from being expanded. Instead, limit based on the number of successful response file expansions, which should still prevent infinite recursion but also avoid false positives. Differential Revision: https://reviews.llvm.org/D60631 > llvm-svn: 358452 llvm-svn: 358466
* Revert [Support] Fix recursive response file expansion guardShoaib Meenai2019-04-151-6/+4
| | | | | | | | This reverts r358452 (git commit c8df4fb9c3865eac52a99602c26bbc070098c3d4) A dependent commit breaks the Windows buildbots. llvm-svn: 358460
* [AArch64][GlobalISel] Don't do extending loads combine for non-pow-2 types.Amara Emerson2019-04-151-0/+5
| | | | | | | | Since non-pow-2 types are going to get split up into multiple loads anyway, don't do the [SZ]EXTLOAD combine for those and save us trouble later in legalization. llvm-svn: 358458
* [LSR] Rewrite misses some fixup locations if it splits critical edgeQuentin Colombet2019-04-151-1/+42
| | | | | | | | | | | | | | | If LSR split critical edge during rewriting phi operands and phi node has other pending fixup operands, we need to update those pending fixups. Otherwise formulae will not be implemented completely and some instructions will not be eliminated. llvm.org/PR41445 Differential Revision: https://reviews.llvm.org/D60645 Patch by: Denis Bakhvalov <denis.bakhvalov@intel.com> llvm-svn: 358457
* Only use argv[0] as the main executable name if it exists.Sean Silva2019-04-151-2/+2
| | | | | | | | | | | | Under some environments, argv[0] doesn't hold a valid file name, but sys::fs::getMainExecutable will find the main executable properly. This patch tweaks the logic to fall back to sys::fs::getMainExecutable in more situations. Differential Revision: https://reviews.llvm.org/D60730 llvm-svn: 358455
* [Support] Fix recursive response file expansion guardShoaib Meenai2019-04-151-4/+6
| | | | | | | | | | | | | | | Response file expansion limits the amount of expansion to prevent potential infinite recursion. However, the current logic assumes that any argument beginning with @ is a response file, which is not true for e.g. `-Xlinker -rpath -Xlinker @executable_path/../lib` on Darwin. Having too many of these non-response file arguments beginning with @ prevents actual response files from being expanded. Instead, limit based on the number of successful response file expansions, which should still prevent infinite recursion but also avoid false positives. Differential Revision: https://reviews.llvm.org/D60631 llvm-svn: 358452
* [X86] Limit the 'x' inline assembly constraint to zmm0-15 when used for a ↵Craig Topper2019-04-153-1/+8
| | | | | | | | 512 type. The 'v' constraint is used to select zmm0-31. This makes 512 bit consistent with 128/256-bit.a llvm-svn: 358450
* Time profiler: small fixes and optimizationsAnton Afanasyev2019-04-151-35/+43
| | | | | | | | | | | | | | Summary: Fixes from Roman's review here: https://reviews.llvm.org/D58675#1465336 Reviewers: lebedev.ri Subscribers: hiraditya, mgrang, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D60663 llvm-svn: 358448
* AMDGPU: Fix unreachable when counting register usage of SGPR96Matt Arsenault2019-04-151-0/+3
| | | | llvm-svn: 358447
* AMDGPU: Fix printed format of SReg_96Matt Arsenault2019-04-151-0/+3
| | | | | | | These are artificial, so I think this should only come up with inline asm comments. llvm-svn: 358446
* [X86] Block i32/i64 for 'k' and 'Yk' in getRegForInlineAsmConstraint without ↵Craig Topper2019-04-151-24/+21
| | | | | | | | avx512bw. 32 and 64 bit k-registers require avx512bw. If we don't block this properly, it leads to a crash. llvm-svn: 358436
* [LoopPred] Stop passing around builders [NFC]Philip Reames2019-04-151-31/+49
| | | | | | | | | | | | This is a preparatory patch for D60093. This patch itself is NFC, but while preparing this I noticed and committed a small hoisting change in rL358419. The basic structure of the new scheme is that we pass around the guard ("the using instruction"), and select an optimal insert point by examining operands at each construction point. This seems conceptually a bit cleaner to start with as it isolates the knowledge about insertion safety at the actual insertion point. Note that the non-hoisting path is not actually used at the moment. That's not exercised until D60093 is rebased on this one. Differential Revision: https://reviews.llvm.org/D60718 llvm-svn: 358434
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