summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
* [AArch64] Prefer UZP for concat_vector of illegal truncs.Ahmed Bougacha2015-03-211-16/+12
| | | | | | Follow-up to r232459: prefer a UZP shuffle to the intermediate truncs. llvm-svn: 232871
* Make getLastArgNoClaim work for up to 4 arguments.Filipe Cabecinhas2015-03-201-0/+20
| | | | | | | | | | | | | | Summary: This is needed for http://reviews.llvm.org/D8507 I have no idea what stand-alone tests could be done, if needed. Reviewers: Bigcheese, craig.topper, samsonov Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8508 llvm-svn: 232859
* [X86, AVX] instcombine common cases of vperm2* intrinsics into shufflesSanjay Patel2015-03-201-0/+59
| | | | | | | | | | | | | | | | | | | | vperm2* intrinsics are just shuffles. In a few special cases, they're not even shuffles. Optimizing intrinsics in InstCombine is better than handling this in the front-end for at least two reasons: 1. Optimizing custom-written SSE intrinsic code at -O0 makes vector coders really angry (and so I have regrets about some patches from last week). 2. Doing mask conversion logic in header files is hard to write and subsequently read. There are a couple of TODOs in this patch to complete this optimization. Differential Revision: http://reviews.llvm.org/D8486 llvm-svn: 232852
* Fixing a bug with WinEH PHI handlingAndrew Kaylor2015-03-202-5/+30
| | | | llvm-svn: 232851
* [X86] Prefer blendps over insertps codegen for one special caseSanjay Patel2015-03-201-9/+22
| | | | | | | | | | | | | | | | | | | | With this patch, for this one exact case, we'll generate: blendps %xmm0, %xmm1, $1 instead of: insertps %xmm0, %xmm1, $0 If there's a memory operand available for load folding and we're optimizing for size, we'll still generate the insertps. The detailed performance data motivation for this may be found in D7866; in summary, blendps has 2-3x throughput vs. insertps on widely used chips. Differential Revision: http://reviews.llvm.org/D8332 llvm-svn: 232850
* X86: Make helper functions static. NFC.Benjamin Kramer2015-03-201-4/+4
| | | | llvm-svn: 232848
* Remove dead calls and function arguments dealing with TRI in StackMaps.Eric Christopher2015-03-201-4/+2
| | | | llvm-svn: 232847
* Don't declare all text sections at the start of the .sRafael Espindola2015-03-206-72/+61
| | | | | | | | | | | | | | | | | The code this patch removes was there to make sure the text sections went before the dwarf sections. That is necessary because MachO uses offsets relative to the start of the file, so adding a section can change relaxations. The dwarf sections were being printed at the start just to produce symbols pointing at the start of those sections. The underlying issue was fixed in r231898. The dwarf sections are now printed when they are about to be used, which is after we printed the text sections. To make sure we don't regress, the patch makes the MachO streamer assert if CodeGen puts anything unexpected after the DWARF sections. llvm-svn: 232842
* AsmPrinter: Check subprogram before using itDuncan P. N. Exon Smith2015-03-201-2/+5
| | | | | | | Check return of `getDISubprogram()` before using it. A WIP patch makes `DIDescriptor` accessors more strict (and would crash on this). llvm-svn: 232838
* Reorganize the x86 ELF relocation selection logic.Rafael Espindola2015-03-201-176/+198
| | | | | | | | | | | | | | | The main differences are: * Split in 32 and 64 bit functions. * First switch on the Modifier so that we have only one non fully covered switch. * Map the fixup kind first to a x86_64 (or i386) specific enum, to make it easy to handle cases like X86::reloc_riprel_4byte_movq_load. * Switch on IsPCRel last, which reduces code duplication. Fixes pr22308. llvm-svn: 232837
* DwarfDebug: Check for null DebugLocsDuncan P. N. Exon Smith2015-03-201-13/+15
| | | | | | | | | | `DL` might be null, so check for that before using accessors. A WIP patch to make `DIDescriptors` more strict fails otherwise. As a bonus, I think the logic is easier to follow now (despite the extra nesting depth). llvm-svn: 232836
* Verifier: Check that !dbg attachments have the right typeDuncan P. N. Exon Smith2015-03-201-0/+7
| | | | | | | | | | | | | | | A WIP patch makes `DIDescriptor` accessors more strict, which in turn causes the `DebugInfoFinder` to crash on wrongly typed `!dbg` attachments. Catch that error up front in `Verifier::visitInstruction()`. Also remove a test that we "handle" invalid `!dbg` attachments, added back in r99938. We don't want to handle those anymore. Note: I'm *not* recursing and verifying the debug info graph reachable from this node; that work is already done by `verifyDebugInfo()`. llvm-svn: 232834
* DebugInfoFinder: Check for null imported entitiesDuncan P. N. Exon Smith2015-03-201-0/+2
| | | | | | | | Don't use the accessors in `DIImportedEntity` on a null pointer. (A WIP patch to make `DIDescriptor` accessors more strict crashes here otherwise.) llvm-svn: 232833
* SanitizerCoverage: Check for null DebugLocsDuncan P. N. Exon Smith2015-03-201-2/+3
| | | | | | | After a WIP patch to make `DIDescriptor` accessors more strict, this started asserting. llvm-svn: 232832
* SelectionDAGBuilder: Rangeify a loop. NFC.Hans Wennborg2015-03-201-8/+6
| | | | llvm-svn: 232831
* SelectionDAGBuilder::handleJTSwitchCase, simplify loop; NFCHans Wennborg2015-03-201-9/+4
| | | | llvm-svn: 232830
* Correctly estimate SROA savings for store operands in inline cost analysis.Wei Mi2015-03-201-2/+2
| | | | | | | | | | | | When estimating SROA savings, we want to see if an address is derived off an alloca in the caller. For store instructions, operand 1 is the address operand, but the current code uses operand 0. Use getPointerOperand for loads and stores to fix this. Patch by Easwaran Raman. http://reviews.llvm.org/D8425 llvm-svn: 232827
* Small optimization to avoid getting pass info when we will not run loopDaniel Berlin2015-03-201-0/+3
| | | | llvm-svn: 232826
* [ARM] Fix handling of thumb1 out-of-range frame offsetsJohn Brawn2015-03-207-16/+19
| | | | | | | | | | | | | | | | LocalStackSlotPass assumes that isFrameOffsetLegal doesn't change its answer when the base register changes. Unfortunately this isn't true in thumb1, where SP-based loads allow a larger offset than non-SP-based loads, and this causes the base register reuse code to generate instructions that are unencodable, causing an assertion failure. Solve this by adding a BaseReg parameter to isFrameOffsetLegal, which ARMBaseRegisterInfo can then make use of to give the correct answer. Differential Revision: http://reviews.llvm.org/D8419 llvm-svn: 232825
* Stripped trailing whitespace. NFC.Simon Pilgrim2015-03-201-15/+15
| | | | llvm-svn: 232822
* Rewrite StackMap location handling to pre-compute the dwarf registerEric Christopher2015-03-201-83/+95
| | | | | | | | | | | | numbers before emission. This removes a dependency on being able to access TRI at the module level and is similar to the DwarfExpression handling. I've modified the debug support into print/dump routines that'll do the same dumping but is now callable anywhere and if TRI isn't available will go ahead and just print out raw register numbers. llvm-svn: 232821
* At the beginning of doFinalization set the MachineFunction toEric Christopher2015-03-201-0/+5
| | | | | | | | nullptr so that users get an earlier dereferencing error and so that we can use it to conditionalize access to MachineFunction specific data. llvm-svn: 232820
* Typo.Chad Rosier2015-03-201-1/+1
| | | | llvm-svn: 232819
* R600/SI: Refactor VOP2 instruction defsTom Stellard2015-03-201-6/+13
| | | | llvm-svn: 232817
* R600/SI: Refactor VOP1 instruction defsTom Stellard2015-03-201-7/+12
| | | | llvm-svn: 232816
* Reduce indentation after return. NFC.Rafael Espindola2015-03-201-138/+125
| | | | llvm-svn: 232814
* Use early returns. NFC.Rafael Espindola2015-03-201-104/+50
| | | | llvm-svn: 232813
* Fold a llvm_unreachable into an assert. NFC.Rafael Espindola2015-03-201-3/+3
| | | | llvm-svn: 232811
* clang-format a function. NFC.Rafael Espindola2015-03-201-12/+32
| | | | llvm-svn: 232810
* [MBP] Don't outline short optional branchesDaniel Jasper2015-03-201-2/+25
| | | | | | | | | | | | | | | | | | With the option -outline-optional-branches, LLVM will place optional branches out of line (more details on r231230). With this patch, this is not done for short optional branches. A short optional branch is a branch containing a single block with an instruction count below a certain threshold (defaulting to 3). Still everything is guarded under -outline-optional-branches). Outlining a short branch can't significantly improve code locality. It can however decrease performance because of the additional jmp and in cases where the optional branch is hot. This fixes a compile time regression I have observed in a benchmark. Review: http://reviews.llvm.org/D8108 llvm-svn: 232802
* [Tablegen] Attempt to add support for patterns containing nodes with ↵Craig Topper2015-03-201-6/+6
| | | | | | | | | | multiple results. This is needed for AVX512 masked scatter/gather support. The R600 change is necessary to remove a hack that was working around the lack of multiple results. llvm-svn: 232798
* Fix comment from r232794. NFCNick Lewycky2015-03-201-1/+1
| | | | llvm-svn: 232796
* [bpf] fix buildAlexei Starovoitov2015-03-201-2/+1
| | | | | | fix BPF backend build broken by r232699 llvm-svn: 232795
* When simplifying a SCEV truncate by distributing, consider it a ↵Nick Lewycky2015-03-201-4/+6
| | | | | | simplification to replace a cast, even if we end up with a trunc around the term. Fixes PR22960! llvm-svn: 232794
* SampleProfile: Check for missing debug locationsDuncan P. N. Exon Smith2015-03-201-0/+3
| | | | | | | | | Don't use `DebugLoc` accessors if we're pointing at null, which will be a problem after a WIP patch to make the `DIDescriptor` accessors more strict. Caught by Frontend/profile-sample-use-loc-tracking.c (in clang). llvm-svn: 232792
* Verifier: Remove the separate DebugInfoVerifier classDuncan P. N. Exon Smith2015-03-201-28/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the separate `DebugInfoVerifier` class, as a partial step toward better integrating debug info verification with the `Verifier`. Right now, verification of debug info is kind of a mess. - There are `DIDescriptor::Verify()` checks live in `DebugInfo.cpp`. These return `bool`, and there's no way to see (except by opening a debugger) why they fail. - We rely on `DebugInfoFinder` to traverse the debug info graph and dig up nodes. However, the regular `Verifier` visits many of these nodes when it calls into debug info intrinsic operands. Visiting twice and running different checks is kind of absurd. - Moreover, `DebugInfoFinder` asserts on failed type resolution -- the verifier should never assert! By integrating the two verifiers, I'm aiming at solving these problems (work to be done, obviously). Verification can be localized to the `Verifier`; we can use a naive `MDNode` operand traversal to find all the nodes; we can verify type references instead of asserting on failure. There are `assert()`s sprinkled throughout the optimizer and dwarf backend on `DIDescriptor::Verify()` checks. This is a hangover from when the debug info verifier was off, so I plan to remove them as I go (once I confirm that the checks are done at verification time). Note: to keep the behaviour of only running the debug info verifier when -verify succeeds, I've added an `EverBroken` flag. Once the `DebugInfoFinder` assertions are gone and the two traversals have been merged, I expect to be able to remove this. llvm-svn: 232790
* Rewrite SelectionDAGBuilder::Clusterify to run in linear time. NFC.Hans Wennborg2015-03-202-46/+37
| | | | | | | It was previously repeatedly erasing elements from the middle of a vector, causing O(n^2) worst-case run-time. llvm-svn: 232789
* Use the cached subtarget on the MachineFunction when the AsmPrinterEric Christopher2015-03-191-1/+1
| | | | | | | will have a MachineFunction, i.e. in places other than the module level doInitialize/doFinalize. llvm-svn: 232783
* Use the cached subtarget off of the machine function.Eric Christopher2015-03-191-8/+7
| | | | llvm-svn: 232782
* move insert, extract, concat helper functions closer to related helper ↵Sanjay Patel2015-03-191-156/+156
| | | | | | functions; NFCI llvm-svn: 232781
* Fix a nasty bug in DAGCombine of STORE nodes.Owen Anderson2015-03-191-3/+8
| | | | | | | | | | | | | | | This is very related to the bug fixed in r174431. The problem is that SelectionDAG does not include alignment in the uniquing of loads and stores. When an otherwise no-op DAGCombine would increase the alignment of a load or store, the original node would be returned (with the alignment increased), which would cause the node not to be processed by any further DAGCombines. I don't have a direct testcase for this that manifests on an in-tree target, but I did see some noise in the tests for other targets and have updated them for it. llvm-svn: 232780
* Remove unused headers.Eric Christopher2015-03-191-4/+0
| | | | llvm-svn: 232777
* Add an MCSubtargetInfo variable to the TargetMachine.Eric Christopher2015-03-192-3/+11
| | | | | | | | | This enables us to remove calls to the subtarget from the TargetMachine and with a small hack for backends that require global subtarget information for module level code generation, e.g. mips abi flags, as mentioned in a fixme in the code. llvm-svn: 232776
* Add a TargetMachine local MCRegisterInfo and MCInstrInfo so thatEric Christopher2015-03-192-15/+19
| | | | | | | they can be used without a subtarget in constructing subtarget independent passes. llvm-svn: 232775
* WinEH: Make llvm.eh.actions emission match the EH docsReid Kleckner2015-03-191-8/+5
| | | | | | | | | This switches the sense of the i32 values and updates the test cases. We can also use CHECK-SAME to clean up some tests, and reduce the visual noise from bitcasts. llvm-svn: 232774
* [X86, AVX] use blends instead of insert128 with index 0Sanjay Patel2015-03-191-1/+44
| | | | | | | | | | | | | | | Another case of x86-specific shuffle strength reduction: avoid generating insert*128 instructions with index 0 because they are slower than their non-lane-changing blend equivalents. Shuffle lowering already catches most of these cases, but the zero vector case and some other paths such as in the modified test in vector-shuffle-256-v32.ll were getting through. Differential Revision: http://reviews.llvm.org/D8366 llvm-svn: 232773
* Verifier: Remove the separate -verify-di passDuncan P. N. Exon Smith2015-03-195-49/+5
| | | | | | | | | | | | | | Remove `DebugInfoVerifierLegacyPass` and the `-verify-di` pass. Instead, call into the `DebugInfoVerifier` from inside `VerifierLegacyPass::finalizeModule()`. This better matches the logic in `verifyModule()` (used by the new PassManager), avoids requiring two separate passes to verify the IR, and makes the API for "add a pass to verify the IR" simple. Note: the `-verify-debug-info` flag still works (for now, at least; eventually it might make sense to just remove it). llvm-svn: 232772
* LowerBitSets: Avoid reusing byte set addresses.Peter Collingbourne2015-03-191-1/+16
| | | | | | | | | | Each use of the byte array uses a different alias. This makes the backend less likely to reuse previously computed byte array addresses, improving the security of the CFI mechanism based on this pass. Differential Revision: http://reviews.llvm.org/D8455 llvm-svn: 232770
* libLTO, llvm-lto, gold: Introduce flag for controlling optimization level.Peter Collingbourne2015-03-192-14/+34
| | | | | | | | | | This change also introduces a link-time optimization level of 1. This optimization level runs only the globaldce pass as well as cleanup passes for passes that run at -O0, specifically simplifycfg which cleans up lowerbitsets. http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20150316/266951.html llvm-svn: 232769
* PassManagerBuilder: Remove effectively dead 'StripDebug' optionDuncan P. N. Exon Smith2015-03-191-7/+2
| | | | | | | | | `StripDebug` was only used by tools/opt/opt.cpp in `AddStandardLinkPasses()`, but opt.cpp adds the same pass based on its command-line flag before it calls `AddStandardLinkPasses()`. Stripping debug info twice isn't very useful. llvm-svn: 232765
OpenPOWER on IntegriCloud