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* This patch fixes PR13626 by providing i128 support in the returnBill Schmidt2013-01-171-0/+1
| | | | | | | calling convention. 128-bit integers are now properly returned in GPR3 and GPR4 on PowerPC. llvm-svn: 172745
* [ms-inline asm] Add support for the 'SIZE' and 'LENGTH' operators.Chad Rosier2013-01-172-38/+48
| | | | | | Part of rdar://12576868 llvm-svn: 172743
* Add indexed load/store instructions for offset validation check.Jyotsna Verma2013-01-171-0/+4
| | | | | | This patch fixes bug 14902 - http://llvm.org/bugs/show_bug.cgi?id=14902 llvm-svn: 172737
* Added missing const from my last commit.Michael Gottesman2013-01-171-1/+1
| | | | llvm-svn: 172736
* [ObjCARC] Implemented operator<< for InstructionClass and changed a ↵Michael Gottesman2013-01-171-3/+56
| | | | | | ``Visited'' Debug message to use it. llvm-svn: 172735
* This patch fixes the PPC calling convention to handle returns ofBill Schmidt2013-01-171-2/+2
| | | | | | | | | _Complex float and _Complex long double, by simply increasing the number of floating point registers available for return values. The test case verifies that the correct registers are loaded. llvm-svn: 172733
* ASan: add optional 'zero-based shadow' option to ASan passes. Always tell ↵Alexey Samsonov2013-01-171-35/+39
| | | | | | the values of shadow scale and offset to the runtime llvm-svn: 172709
* Optimization for the following SIGN_EXTEND pairs:Elena Demikhovsky2013-01-173-10/+39
| | | | | | | | | | | | v8i8 -> v8i64, v8i8 -> v8i32, v4i8 -> v4i64, v4i16 -> v4i64 for AVX and AVX2. Bug 14865. llvm-svn: 172708
* Combine AVX and SSE forms of MOVSS and MOVSD into the same multiclasses so ↵Craig Topper2013-01-171-74/+50
| | | | | | they get instantiated together. llvm-svn: 172704
* Fix the assembly and dissassembly of DW_FORM_sec_offset. Found this byEric Christopher2013-01-174-22/+16
| | | | | | | | | changing both the string of the dwo_name to be correct and the type of the statement list. Testcases all around. llvm-svn: 172699
* Add the DW_AT_GNU_addr_base for the skeleton cu. Add support forEric Christopher2013-01-173-5/+9
| | | | | | | emitting the dwarf32 version of DW_FORM_sec_offset and correct disassembler support. llvm-svn: 172698
* Move MachineTraceMetrics.h into include/llvm/CodeGen.Jakob Stoklund Olesen2013-01-174-354/+3
| | | | | | Let targets use it. llvm-svn: 172688
* Provide a place for targets to insert ILP optimization passes.Jakob Stoklund Olesen2013-01-172-10/+16
| | | | | | | | | | | | | | Move the early if-conversion pass into this group. ILP optimizations usually need to find the right balance between register pressure and ILP using the MachineTraceMetrics analysis to identify critical paths and estimate other costs. Such passes should run together so they can share dominator tree and loop info analyses. Besides if-conversion, future passes to run here here could include expression height reduction and ARM's MLxExpansion pass. llvm-svn: 172687
* This is a resubmittal. For some reason it broke the bots yesterdayJack Carter2013-01-173-2/+24
| | | | | | | | | | | | | but I cannot reproduce the problem and have scrubed my sources and even tested with llvm-lit -v --vg. The Mips RDHWR (Read Hardware Register) instruction was not tested for assembler or dissassembler consumption. This patch adds that functionality. Contributer: Vladimir Medic llvm-svn: 172685
* [IR] Add 'Append' and 'AppendUnique' module flag behaviors.Daniel Dunbar2013-01-162-13/+61
| | | | llvm-svn: 172659
* Change CostTable model to be global to all targetsRenato Golin2013-01-162-102/+107
| | | | | | | | Moving the X86CostTable to a common place, so that other back-ends can share the code. Also simplifying it a bit and commoning up tables with one and two types on operations. llvm-svn: 172658
* Some small (and mostly cosmetic) fixes.Eli Bendersky2013-01-161-22/+17
| | | | llvm-svn: 172640
* Now that GenericAsmParser was folded into AsmParser, some methods and types canEli Bendersky2013-01-161-17/+57
| | | | | | return into the safe harbor of AsmParser's private areas. llvm-svn: 172637
* [Linker] Change module flag linking to be more extensible.Daniel Dunbar2013-01-161-133/+97
| | | | | | | | | | - Instead of computing a bunch of buckets of different flag types, just do an incremental link resolving conflicts as they arise. - This also has the advantage of making the link result deterministic and not dependent on map iteration order. llvm-svn: 172634
* We want the dwarf AT_producer for assembly source files to match clang'sKevin Enderby2013-01-161-3/+9
| | | | | | | | | | | | | | | AT_producer. Which includes clang's version information so we can tell which version of the compiler was used. This is the first of two steps to allow us to do that. This is the llvm-mc change to provide a method to set the AT_producer string. The second step, coming soon to a clang near you, will have the clang driver pass the value of getClangFullVersion() via an flag when invoking the integrated assembler on assembly source files. rdar://12955296 llvm-svn: 172630
* Introduce llvm::sys::getProcessTriple() function.Peter Collingbourne2013-01-162-13/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | In r143502, we renamed getHostTriple() to getDefaultTargetTriple() as part of work to allow the user to supply a different default target triple at configure time. This change also affected the JIT. However, it is inappropriate to use the default target triple in the JIT in most circumstances because this will not necessarily match the current architecture used by the process, leading to illegal instruction and other such errors at run time. Introduce the getProcessTriple() function for use in the JIT and its clients, and cause the JIT to use it. On architectures with a single bitness, the host and process triples are identical. On other architectures, the host triple represents the architecture of the host CPU, while the process triple represents the architecture used by the host CPU to interpret machine code within the current process. For example, when executing 32-bit code on a 64-bit Linux machine, the host triple may be 'x86_64-unknown-linux-gnu', while the process triple may be 'i386-unknown-linux-gnu'. This fixes JIT for the 32-on-64-bit (and vice versa) build on non-Apple platforms. Differential Revision: http://llvm-reviews.chandlerc.com/D254 llvm-svn: 172627
* Allow vectors in CreatePointerCast of constants.Evgeniy Stepanov2013-01-161-3/+4
| | | | llvm-svn: 172615
* ASan: wrap mapping scale and offset in a struct and make it a member of ASan ↵Alexey Samsonov2013-01-161-51/+78
| | | | | | passes. Add test for non-default mapping scale and offset. No functionality change llvm-svn: 172610
* [ObjCARC] Turn off ignoring unwind edges in ObjCARC when ↵Michael Gottesman2013-01-161-33/+0
| | | | | | | | | | | | | -fno-objc-arc-exception is enabled due to it's affect on correctness. Specifically according to the semantics of ARC -fno-objc-arc-exception simply states that it is expected that the unwind path out of a call *MAY* not release objects. Thus we can have the situation where a release gets moved into a catch block which we ignore when we remove a retain/release pair resulting in (even though we assume the program is exiting anyways) the cleanup code path potentially blowing up before program exit. llvm-svn: 172599
* reverting 172579Jack Carter2013-01-163-21/+2
| | | | llvm-svn: 172594
* Define metadata interfaces for describing a static data memberEric Christopher2013-01-164-46/+131
| | | | | | | | | | | of a class. Emit static data member declarations and definitions through correctly. Part of PR14471. Patch by Paul Robinson! llvm-svn: 172590
* Use the ExtensionDirectiveHandler type in other places where it makes sense.Eli Bendersky2013-01-164-15/+16
| | | | | | | Since we already have this type it's a shame to keep dragging a pair of object and method around explicitly. llvm-svn: 172584
* Akira,Jack Carter2013-01-163-2/+21
| | | | | | | | | | | | Hope you are feeling better. The Mips RDHWR (Read Hardware Register) instruction was not tested for assembler or dissassembler consumption. This patch adds that functionality. Contributer: Vladimir Medic llvm-svn: 172579
* Split address information for DWARF5 split dwarf proposal. This involvesEric Christopher2013-01-1511-27/+161
| | | | | | | | | | | | | | | using the DW_FORM_GNU_addr_index and a separate .debug_addr section which stays in the executable and is fully linked. Sneak in two other small changes: a) Print out the debug_str_offsets.dwo section. b) Change form we're expecting the entries in the debug_str_offsets.dwo section to take from ULEB128 to U32. Add tests for all of this in the fission-cu.ll test. llvm-svn: 172578
* Teach InstCombine to optimize extract of a value from a vector add operation ↵Nadav Rotem2013-01-151-0/+9
| | | | | | with a constant zero. llvm-svn: 172576
* Optimize the memory usage of MC bundling, by creating a new type of fragmentEli Bendersky2013-01-152-4/+46
| | | | | | | | | | | | | | | | | into which we can emit single instructions without fixups (which is most instructions). This is an optimization required because MCDataFragment is prety large (240 bytes on x64), with no change in functionality. For large programs, this reduces memory usage overhead required for bundling by 40%. To make the code as palatable as possible, the MCEncodedFragment interface was further fragmented (no pun intended) and MCEncodedFragmentWithFixups is used as the interface to work against when the user expects fixups. MCDataFragment and MCRelaxableFragment implement this interface, while the new MCCompactEncodedInstFragment implements MCEncodeFragment. llvm-svn: 172572
* [ms-inline asm] Address the FIXME in AsmParser.cpp.Chad Rosier2013-01-151-4/+2
| | | | | | | | | | // FIXME: Constraints are hard coded to 'm', but we need an 'r' // constraint for addressof. This needs to be cleaned up! Test cases are already in place. Specifically, clang/test/CodeGen/ms-inline-asm.c t15(), t16(), and t24(). llvm-svn: 172569
* Refactor generic Asm directive parsing.Eli Bendersky2013-01-151-790/+802
| | | | | | | | | | | | | | | | | | After discussing the refactoring with Jim and Daniel, the following changes were made: * All generic directive parsing is now done by AsmParser itself. The previous division between it and GenericAsmParser did not have clear boundaries and just produced unnatural code of GenericAsmParser juggling the internals of AsmParser through an interface. The division of responsibilities is now clear: target-specific directives, other extensions (used by platform-specific parseres), and generic directives. * Priority for directive parsing was reshuffled to ask extensions first and check the generic directives later. No change in functionality. llvm-svn: 172568
* 1. Hoist minus sign as high as possible in an attempt to revealShuxin Yang2013-01-151-31/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | some optimization opportunities (in the enclosing supper-expressions). rule 1. (-0.0 - X ) * Y => -0.0 - (X * Y) if expression "-0.0 - X" has only one reference. rule 2. (0.0 - X ) * Y => -0.0 - (X * Y) if expression "0.0 - X" has only one reference, and the instruction is marked "noSignedZero". 2. Eliminate negation (The compiler was already able to handle these opt if the 0.0s are replaced with -0.0.) rule 3: (0.0 - X) * (0.0 - Y) => X * Y rule 4: (0.0 - X) * C => X * -C if the expr is flagged "noSignedZero". 3. Rule 5: (X*Y) * X => (X*X) * Y if X!=Y and the expression is flagged with "UnsafeAlgebra". The purpose of this transformation is two-fold: a) to form a power expression (of X). b) potentially shorten the critical path: After transformation, the latency of the instruction Y is amortized by the expression of X*X, and therefore Y is in a "less critical" position compared to what it was before the transformation. 4. Remove the InstCombine code about simplifiying "X * select". The reasons are following: a) The "select" is somewhat architecture-dependent, therefore the higher level optimizers are not able to precisely predict if the simplification really yields any performance improvement or not. b) The "select" operator is bit complicate, and tends to obscure optimization opportunities. It is btter to keep it as low as possible in expr tree, and let CodeGen to tackle the optimization. llvm-svn: 172551
* [Linker] Drop asserts that are embedded in cast<> and now checked by the ↵Daniel Dunbar2013-01-151-11/+0
| | | | | | verifier. llvm-svn: 172550
* [IR] Add verification for module flags with the "require" behavior.Daniel Dunbar2013-01-151-7/+35
| | | | llvm-svn: 172549
* LoopVectorizer cost model. Honor the user command line flag that selects the ↵Nadav Rotem2013-01-151-1/+1
| | | | | | vectorization factor even if the target machine does not have any vector registers. llvm-svn: 172544
* [msan] Fix handling of equality comparison of pointer vectors.Evgeniy Stepanov2013-01-151-6/+9
| | | | | | Also improve test coveration of the handling of relational comparisons. llvm-svn: 172539
* Allow vectors in CreatePointerCast.Evgeniy Stepanov2013-01-151-3/+3
| | | | | | Both underlying IR operations support vectors of pointers already. llvm-svn: 172538
* [Object][ELF] Simplify ELFObjectFile by using ELFType.Michael J. Spencer2013-01-152-49/+49
| | | | | | | | | | | | | This simplifies the usage and implementation of ELFObjectFile by using ELFType to replace: <endianness target_endianness, std::size_t max_alignment, bool is64Bits> This does complicate the base ELF types as they must now use template template parameters to partially specialize for the 32 and 64bit cases. However these are only defined once. llvm-svn: 172515
* [IR] Add verifier support for llvm.module.flags.Daniel Dunbar2013-01-151-0/+57
| | | | | | | - Also, update the LangRef documentation on module flags to match the implementation. llvm-svn: 172498
* This patch fixes a Mips specific bug where Jack Carter2013-01-151-1/+7
| | | | | | | | | | | we need to generate a N64 compound relocation R_MIPS_GPREL_32/R_MIPS_64/R_MIPS_NONE. The bug was exposed by the SingleSourcetest case DuffsDevice.c. Contributer: Jack Carter llvm-svn: 172496
* Now GenericAsmParser and AsmParser are no longer friends, GenericAsmParser canEli Bendersky2013-01-141-4/+0
| | | | | | | | simply use the getParser method from MCAsmParserExtension, working through the MCAsmParser interface. There's no longer a need to overload that method to cast it to the concrete AsmParser. llvm-svn: 172491
* Properly encapsulate additional methods and data from AsmParser.Eli Bendersky2013-01-141-67/+72
| | | | | | | | | This finally allows AsmParser to no longer list GenericAsmParser as a friend. All member vars directly accessed by GenericAsmParser have been properly encapsulated and exposed through the MCAsmParser interface. This reduces the coupling between AsmParser and GenericAsmParser. llvm-svn: 172490
* Remove trailing spaces.Jakub Staszak2013-01-143-78/+78
| | | | llvm-svn: 172489
* This change is to implement following rules under the condition C_A and/or C_RShuxin Yang2013-01-141-8/+127
| | | | | | | | | | | | | | | | | | | | | --------------------------------------------------------------------------- C_A: reassociation is allowed C_R: reciprocal of a constant C is appropriate, which means - 1/C is exact, or - reciprocal is allowed and 1/C is neither a special value nor a denormal. ----------------------------------------------------------------------------- rule1: (X/C1) / C2 => X / (C2*C1) (if C_A) => X * (1/(C2*C1)) (if C_A && C_R) rule 2: X*C1 / C2 => X * (C1/C2) if C_A rule 3: (X/Y)/Z = > X/(Y*Z) (if C_A && at least one of Y and Z is symbolic value) rule 4: Z/(X/Y) = > (Z*Y)/X (similar to rule3) rule 5: C1/(X*C2) => (C1/C2) / X (if C_A) rule 6: C1/(X/C2) => (C1*C2) / X (if C_A) rule 7: C1/(C2/X) => (C1/C2) * X (if C_A) llvm-svn: 172488
* [ms-inline asm] Extend support for parsing Intel bracketed memory operands thatChad Rosier2013-01-141-86/+277
| | | | | | | have an arbitrary ordering of the base register, index register and displacement. rdar://12527141 llvm-svn: 172484
* Improve r172468: const_cast is not needed hereDmitri Gribenko2013-01-141-3/+2
| | | | llvm-svn: 172483
* Improve r172471: avoid all those extra casts on the lines nearbyDmitri Gribenko2013-01-141-4/+6
| | | | llvm-svn: 172481
* This patch addresses an incorrect transformation in the DAG combiner.Bill Schmidt2013-01-141-5/+15
| | | | | | | | | | | | | | | | | | | | | | The included test case is derived from one of the GCC compatibility tests. The problem arises after the selection DAG has been converted to type-legalized form. The combiner first sees a 64-bit load that can be converted into a pre-increment form. The original load feeds into a SRL that isolates the upper 32 bits of the loaded doubleword. This looks like an opportunity for DAGCombiner::ReduceLoadWidth() to replace the 64-bit load with a 32-bit load. However, this transformation is not valid, as the replacement load is not a pre-increment load. The pre-increment load produces an extra result, which feeds a subsequent add instruction. The replacement load only has one result value, and this value is propagated to all uses of the pre- increment load, including the add. Because the add is looking for the second result value as its operand, it ends up attempting to add a constant to a token chain, resulting in a crash. So the patch simply disables this transformation for any load with more than two result values. llvm-svn: 172480
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