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* AMDGPU: Remove bfi and bfm intrinsicsMatt Arsenault2016-02-082-13/+0
| | | | | | Nothing is using them. llvm-svn: 260123
* [ThinLTO] Remove imported available externally defs from comdats.Teresa Johnson2016-02-081-2/+14
| | | | | | | | | | | | | | | Summary: Available externally definitions are considered declarations for the linker and eventually dropped. As such they are not allowed to be in comdats. Remove any such imported functions from comdats. Reviewers: rafael Subscribers: davidxl, llvm-commits, joker.eph Differential Revision: http://reviews.llvm.org/D16120 llvm-svn: 260122
* [PGO] Enable compression in pgo instrumentationXinliang David Li2016-02-083-18/+68
| | | | | | | | | | | | This reduces sizes of instrumented object files, final binaries, process images, and raw profile data. The format of the indexed profile data remain the same. Differential Revision: http://reviews.llvm.org/D16388 llvm-svn: 260117
* [SCEV][LAA] Re-commit r260085 and r260086, this time with a fix for the memorySilviu Baranga2016-02-085-30/+300
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sanitizer issue. The PredicatedScalarEvolution's copy constructor wasn't copying the Generation value, and was leaving it un-initialized. Original commit message: [SCEV][LAA] Add no wrap SCEV predicates and use use them to improve strided pointer detection Summary: This change adds no wrap SCEV predicates with: - support for runtime checking - support for expression rewriting: (sext ({x,+,y}) -> {sext(x),+,sext(y)} (zext ({x,+,y}) -> {zext(x),+,sext(y)} Note that we are sign extending the increment of the SCEV, even for the zext case. This is needed to cover the fairly common case where y would be a (small) negative integer. In order to do this, this change adds two new flags: nusw and nssw that are applicable to AddRecExprs and permit the transformations above. We also change isStridedPtr in LAA to be able to make use of these predicates. With this feature we should now always be able to work around overflow issues in the dependence analysis. Reviewers: mzolotukhin, sanjoy, anemet Subscribers: mzolotukhin, sanjoy, llvm-commits, rengolin, jmolloy, hfinkel Differential Revision: http://reviews.llvm.org/D15412 llvm-svn: 260112
* [JumpThreading] Change a return of ComputeValueKnownInPredecessors()Haicheng Wu2016-02-081-1/+1
| | | | | | | | | Change a return statement of ComputeValueKnownInPredecessors() to be the same as the rest return statements of the function. Otherwise, it might return true with an empty Result when the current basic block has no predecessors and trigger the first assert of JumpThreading::ProcessThreadableEdges(). llvm-svn: 260110
* SelectionDAG: Lower some range metadata to AssertZextMatt Arsenault2016-02-082-3/+45
| | | | | | | | | | If a range has a lower bound of 0, add an AssertZext from the nearest floor power of two. This allows operations with some workitem intrinsics with known maximum ranges to use fast 24-bit multiplies. llvm-svn: 260109
* [AVX512][PROLQ][PROLD] Change imm8 to intMichael Zuckerman2016-02-081-6/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D16983 llvm-svn: 260101
* [SLP] Fix placement of debug statement (NFC)Igor Breger2016-02-081-7/+7
| | | | | | | | By Ayal Zaks (ayal.zaks@intel.com) Differential Revision: http://reviews.llvm.org/D16976 llvm-svn: 260094
* Revert r260086 and r260085. They have broken the memorySilviu Baranga2016-02-085-299/+30
| | | | | | sanitizer bots. llvm-svn: 260087
* [LoopVersioning] Don't assert when there are no memchecksSilviu Baranga2016-02-081-1/+0
| | | | | | | | | | | | We shouldn't assert when there are no memchecks, since we can have SCEV checks. There is already an assert covering the case where there are no SCEV checks or memchecks. This also changes the LAA pointer wrapping versioning test to use the loop versioning pass (this was how I managed to trigger the assert in the loop versioning pass). llvm-svn: 260086
* [SCEV][LAA] Add no wrap SCEV predicates and use use them to improve strided ↵Silviu Baranga2016-02-084-29/+299
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | pointer detection Summary: This change adds no wrap SCEV predicates with: - support for runtime checking - support for expression rewriting: (sext ({x,+,y}) -> {sext(x),+,sext(y)} (zext ({x,+,y}) -> {zext(x),+,sext(y)} Note that we are sign extending the increment of the SCEV, even for the zext case. This is needed to cover the fairly common case where y would be a (small) negative integer. In order to do this, this change adds two new flags: nusw and nssw that are applicable to AddRecExprs and permit the transformations above. We also change isStridedPtr in LAA to be able to make use of these predicates. With this feature we should now always be able to work around overflow issues in the dependence analysis. Reviewers: mzolotukhin, sanjoy, anemet Subscribers: mzolotukhin, sanjoy, llvm-commits, rengolin, jmolloy, hfinkel Differential Revision: http://reviews.llvm.org/D15412 llvm-svn: 260085
* [asan] Introduce new hidden -asan-use-private-alias option.Maxim Ostapenko2016-02-081-6/+44
| | | | | | | | | | | | | | | | As discussed in https://github.com/google/sanitizers/issues/398, with current implementation of poisoning globals we can have some CHECK failures or false positives in case of mixing instrumented and non-instrumented code due to ASan poisons innocent globals from non-sanitized binary/library. We can use private aliases to avoid such errors. In addition, to preserve ODR violation detection, we introduce new __odr_asan_gen_XXX symbol for each instrumented global that indicates if this global was already registered. To detect ODR violation in runtime, we should only check the value of indicator and report an error if it isn't equal to zero. Differential Revision: http://reviews.llvm.org/D15642 llvm-svn: 260075
* [WebAssembly] Add another optimization idea to README.txt.Dan Gohman2016-02-081-0/+5
| | | | llvm-svn: 260070
* [X86] Change FeatureIFMA string to 'avx512ifma'. Matches gcc and fixes PR26461.Craig Topper2016-02-081-1/+1
| | | | llvm-svn: 260069
* [Support] Use hexdigit. NFCCraig Topper2016-02-081-3/+2
| | | | llvm-svn: 260068
* [X86][SSE] Resolve target shuffle inputs to sentinels to permit more combinesSimon Pilgrim2016-02-071-39/+107
| | | | | | | | | | | | The combineX86ShufflesRecursively only supports unary shuffles, but was missing the opportunity to combine binary shuffles with a zero / undef second input. This patch resolves target shuffle inputs, converting the shuffle mask elements to SM_SentinelUndef/SM_SentinelZero where possible. It then resolves the updated mask to check if we have created a faux unary shuffle. Additionally, we now attempt to recursively call combineX86ShufflesRecursively for all input operands (we used to just recurse for unary integer shuffles and unary unpacks) - it safely returns early if its not a target shuffle. Differential Revision: http://reviews.llvm.org/D16683 llvm-svn: 260063
* Revert 259942, r259943, r259948.Nico Weber2016-02-071-4/+0
| | | | | | | | | | | | | | | | The Windows bots have been failing for the last two days, with: FAILED: C:\PROGRA~2\MICROS~1.0\VC\bin\amd64\cl.exe -c LLVMContextImpl.cpp D:\buildslave\clang-x64-ninja-win7\llvm\lib\IR\LLVMContextImpl.cpp(137) : error C2248: 'llvm::TrailingObjects<llvm::AttributeSetImpl, llvm::IndexAttrPair>::operator delete' : cannot access private member declared in class 'llvm::AttributeSetImpl' TrailingObjects.h(298) : see declaration of 'llvm::TrailingObjects<llvm::AttributeSetImpl, llvm::IndexAttrPair>::operator delete' AttributeImpl.h(213) : see declaration of 'llvm::AttributeSetImpl' llvm-svn: 260053
* [X86][SSE] Added support for MOVHPD/MOVLPD + MOVHPS/MOVLPS shuffle decoding.Simon Pilgrim2016-02-073-0/+48
| | | | llvm-svn: 260034
* [X86][AVX512] add intrinsics of Scalar FP to integer conversion with ↵Asaf Badouh2016-02-076-36/+74
| | | | | | | | rounding mode Differential Revision: http://reviews.llvm.org/D16629 llvm-svn: 260033
* [X86][SSE] Pulled out repeated target shuffle decodes into helper functions. ↵Simon Pilgrim2016-02-071-136/+89
| | | | | | | | | | NFCI. Pulled out the code used by PSHUFB/VPERMV/VPERMV3 shuffle mask decoding into common helper functions. The helper functions handle masks coming from BROADCAST/BUILD_VECTOR and ConstantPool nodes respectively. llvm-svn: 260032
* AVX512: VPBROADCASTB/W/D/Q from GPR intrinsics implementation.Igor Breger2016-02-073-70/+89
| | | | | | Differential Revision: http://reviews.llvm.org/D16813 llvm-svn: 260024
* Don't use module context here. It's unnecessary and makes it harder to write ↵Daniel Berlin2016-02-071-2/+2
| | | | | | unittests llvm-svn: 260015
* Compute live-in for MemorySSADaniel Berlin2016-02-071-1/+41
| | | | llvm-svn: 260014
* Only insert into definingblocks once per blockDaniel Berlin2016-02-071-1/+4
| | | | llvm-svn: 260013
* [X86][AVX512] Added support for VPMOVZX shuffle decoding.Simon Pilgrim2016-02-061-75/+35
| | | | llvm-svn: 260007
* [X86][SSE] Moved shuffle decode CASE macros earlier. NFC.Simon Pilgrim2016-02-061-48/+48
| | | | | | To allow the helper functions to make use of them. llvm-svn: 259997
* [X86][SSE] Refactored PMOVZX shuffle decoding to use scalar input typesSimon Pilgrim2016-02-063-75/+47
| | | | | | | | First step towards being able to decode AVX512 PMOVZX instructions without a massive bloat in the shuffle decode switch statement. This should also make it easier to decode X86ISD::VZEXT target shuffles in the future. llvm-svn: 259995
* [ThinLTO] Include linkage type in function summaryTeresa Johnson2016-02-063-11/+20
| | | | | | | | | | | | | | | | Summary: Adds the linkage type to both the per-module and combined function summaries, which subsumes the current islocal bit. This will eventually be used to optimized linkage types based on global summary-based analysis. Reviewers: joker.eph Subscribers: joker.eph, davidxl, llvm-commits Differential Revision: http://reviews.llvm.org/D16943 llvm-svn: 259993
* [X86][SSE] Don't replace an existing 32-bit load with its duplicateSimon Pilgrim2016-02-061-1/+2
| | | | | | | | If we are already loading a single 32-bit float/integer then just reuse it. Fix for regression in D16729 llvm-svn: 259991
* Comment fixSimon Pilgrim2016-02-061-1/+1
| | | | llvm-svn: 259990
* New Loop Versioning LICM PassAshutosh Nema2016-02-064-0/+636
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When alias analysis is uncertain about the aliasing between any two accesses, it will return MayAlias. This uncertainty from alias analysis restricts LICM from proceeding further. In cases where alias analysis is uncertain we might use loop versioning as an alternative. Loop Versioning will create a version of the loop with aggressive aliasing assumptions in addition to the original with conservative (default) aliasing assumptions. The version of the loop making aggressive aliasing assumptions will have all the memory accesses marked as no-alias. These two versions of loop will be preceded by a memory runtime check. This runtime check consists of bound checks for all unique memory accessed in loop, and it ensures the lack of memory aliasing. The result of the runtime check determines which of the loop versions is executed: If the runtime check detects any memory aliasing, then the original loop is executed. Otherwise, the version with aggressive aliasing assumptions is used. The pass is off by default and can be enabled with command line option -enable-loop-versioning-licm. Reviewers: hfinkel, anemet, chatur01, reames Subscribers: MatzeB, grosser, joker.eph, sanjoy, javed.absar, sbaranga, llvm-commits Differential Revision: http://reviews.llvm.org/D9151 llvm-svn: 259986
* Relax assertion in ReplaceableMetadataImpl::replaceAllUsesWith().Adrian Prantl2016-02-061-2/+0
| | | | | | | | | | There is a legitimate use-case in clang where we need to replace a temporary placeholder node with the temporary node that may be a forward declaration. <rdar://problem/24493203> llvm-svn: 259973
* [Orc] Slightly improve the x86-64 resolver block machine code.Lang Hames2016-02-061-8/+7
| | | | | | Replace leaq + movq of a pointer with a single movabsq. llvm-svn: 259968
* [AArch64] Add the scheduling model for Exynos-M1Evandro Menezes2016-02-062-2/+361
| | | | | | | | | | | | | | Summary: Add the core scheduling model for the Samsung Exynos-M1 (ARMv8-A). Reviewers: jmolloy, rengolin, christof, MinSeongKIM, t.p.northover Subscribers: aemerson, rengolin, MatzeB Differential Revision: http://reviews.llvm.org/D16644 llvm-svn: 259958
* [StatepointLower] Use None instead of Optional<int>()Sanjoy Das2016-02-051-5/+5
| | | | llvm-svn: 259956
* [Orc] Fix a typo in the comments for the x86_64 resolver block.Lang Hames2016-02-051-2/+2
| | | | llvm-svn: 259953
* Attempt#2 to work around MSVC rejects-valid.Richard Smith2016-02-051-2/+2
| | | | llvm-svn: 259948
* More workarounds for undefined behavior exposed when compiling in C++14 withRichard Smith2016-02-051-0/+4
| | | | | | | | -fsized-deallocation. Disable sized deallocation for all objects derived from TrailingObjects, as we expect the storage allocated for these objects to be larger than the size of their dynamic type. llvm-svn: 259942
* CallAnalyzer::analyzeCall: change the condition back to "Cost < Threshold"Hans Wennborg2016-02-051-1/+1
| | | | | | | | In r252595, I inadvertently changed the condition to "Cost <= Threshold", which caused a significant size regression in Chrome. This commit rectifies that. llvm-svn: 259915
* [AArch64] Refactoring aarch64-ldst-opt. NCF.Jun Bum Lim2016-02-051-25/+38
| | | | | | | Remove narrow load / store instructions from getMatchingPairOpcode(), and add getMatchingWideOpcode(). llvm-svn: 259914
* AMDGPU: Account for LDS alignmentMatt Arsenault2016-02-051-4/+9
| | | | | | | | | | | | | The current situation isn't great, because the amount of padding requires is determined by the inverse order of the first encountered use. We should eventually somehow sort these to minimize wasted space. Another problem is the alignment of kernel arguments isn't respected. The group_segment_alignment is always emitted as the default 16, and typed arguments with higher alignments or an explicitly set alignment are also ignored. llvm-svn: 259912
* AMDGPU: Preserve alignments on new created globalsMatt Arsenault2016-02-051-2/+10
| | | | | | | Also switch to internal linkage, and include the name of the function in the name. llvm-svn: 259911
* AMDGPU: Remove some purely R600 functions from AMDGPUInstrInfoTom Stellard2016-02-055-96/+28
| | | | | | | | | | Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D16862 llvm-svn: 259900
* AMDGPU: Fix ordering of CPU and FS parameters in TargetMachine constructorsTom Stellard2016-02-052-10/+10
| | | | | | | | | | Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D16863 llvm-svn: 259897
* Some stackslots are allocated to vregs which have no real reference.Wei Mi2016-02-051-7/+9
| | | | | | | | | | | | | | LiveRangeEdit::eliminateDeadDef is used to remove dead define instructions after rematerialization. To remove a VNI for a vreg from its LiveInterval, LiveIntervals::removeVRegDefAt is used. However, after non-PHI VNIs are all removed, PHI VNI are still left in the LiveInterval. Such unused vregs will be kept in RegsToSpill[] at the end of InlineSpiller::reMaterializeAll and spiller will allocate stackslot for them. The fix is to get rid of unused reg by checking whether it has non-dbg reference instead of whether it has non-empty interval. llvm-svn: 259895
* AMDGPU/SI: Correctly initialize SIInsertWaits passTom Stellard2016-02-053-7/+22
| | | | | | | | | | Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D16724 llvm-svn: 259894
* [WebAssembly] Update the select instructions' operand orders to match the spec.Dan Gohman2016-02-052-16/+16
| | | | llvm-svn: 259893
* Fix for PR 26193Nemanja Ivanovic2016-02-051-1/+1
| | | | | | | This is a simple fix for a PowerPC intrinsic that was incorrectly defined (the return type was incorrect). llvm-svn: 259886
* Move classes defined in a cpp file into an anonymous namespace.Benjamin Kramer2016-02-052-0/+4
| | | | | | No functionality change intended. llvm-svn: 259883
* Revert "[AArch64] Improve load/store optimizer to handle LDUR + LDR (take 3)."Renato Golin2016-02-051-76/+21
| | | | | | This reverts commit r259812 as it broke AArch64 self-hosting. llvm-svn: 259881
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