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* hoist the new isel interpreter out of DAGISelHeader.hChris Lattner2010-02-281-0/+859
| | | | | | | | (which gets #included into the middle of each target's DAGISel class) into a .cpp file where it is only compiled once. llvm-svn: 97425
* enhance the new isel to handle the 'node already exists'Chris Lattner2010-02-281-1/+1
| | | | | | case of MorphNodeTo directly. llvm-svn: 97417
* simplify this code, return only ever has zero or one operands.Chris Lattner2010-02-281-8/+6
| | | | llvm-svn: 97408
* Properly clear all the extra bits in a significand when making a NaN from anJohn McCall2010-02-281-8/+28
| | | | | | | APInt. Be certain to set the integer bit in an x87 extended-precision significand so that we don't accidentally make a pseudo-NaN. llvm-svn: 97382
* Add an override to StringRef::getAsInteger which parses into an APInt.John McCall2010-02-281-12/+93
| | | | | | | | | | It gets its own implementation totally divorced from the (presumably performance-sensitive) routines which parse into a uint64_t. Add APInt::operator|=(uint64_t), which is situationally much better than using a full APInt. llvm-svn: 97381
* Add support for global variables in an address space for llvm-c and ocaml.Erick Tryzelaar2010-02-281-0/+8
| | | | llvm-svn: 97377
* Add indirect br support to llvm-c and ocaml.Erick Tryzelaar2010-02-281-0/+13
| | | | llvm-svn: 97376
* Add metadata functions to llvm-c and ocaml.Erick Tryzelaar2010-02-281-0/+56
| | | | llvm-svn: 97375
* remove redundant instruction.Chris Lattner2010-02-281-2/+2
| | | | llvm-svn: 97374
* Add the new builder arthmetic instructions to llvm-c and ocaml.Erick Tryzelaar2010-02-281-0/+81
| | | | llvm-svn: 97372
* Add the new union arthmetic instructions to llvm-c and ocaml.Erick Tryzelaar2010-02-281-1/+3
| | | | llvm-svn: 97371
* Add generic binary op and cast builder functions.Erick Tryzelaar2010-02-281-0/+13
| | | | llvm-svn: 97370
* Revert r97245 which seems to be causing performance problems.Bob Wilson2010-02-281-6/+5
| | | | llvm-svn: 97366
* Teach APFloat how to create both QNaNs and SNaNs and with arbitrary-widthJohn McCall2010-02-282-12/+45
| | | | | | | | payloads. APFloat's internal folding routines always make QNaNs now, instead of sometimes making QNaNs and sometimes SNaNs depending on the type. llvm-svn: 97364
* Don't try to replace physical registers when doing CSE.Dan Gohman2010-02-281-1/+12
| | | | llvm-svn: 97360
* Add a flag to addPassesToEmit* to disable the Verifier pass runDan Gohman2010-02-286-14/+30
| | | | | | after LSR, so that clients can opt in. llvm-svn: 97357
* Implement XMM subregs.Dan Gohman2010-02-285-163/+168
| | | | | | | | | | | Extracting the low element of a vector is now done with EXTRACT_SUBREG, and the zero-extension performed by load movss is now modeled with SUBREG_TO_REG, and so on. Register-to-register movss and movsd are no longer considered copies; they are two-address instructions which insert a scalar into a vector. llvm-svn: 97354
* Don't unconditionally suppress hoisting of instructions with implicitDan Gohman2010-02-281-26/+4
| | | | | | | | defs or uses. The regular def and use checking below covers them, and can be more precise. It's safe to hoist an instruction with a dead implicit def if the register isn't live into the loop header. llvm-svn: 97352
* The mayHaveSideEffects flag is no longer used.Dan Gohman2010-02-2712-26/+24
| | | | llvm-svn: 97348
* remove a bogus pattern, which had the same pattern as STDUChris Lattner2010-02-272-8/+1
| | | | | | | | | but codegen'd differently. This really wanted to use some sort of subreg to get the low 4 bytes of the G8RC register or something. However, it's invalid and nothing is testing it, so I'm just zapping the bogosity. llvm-svn: 97345
* fix an incorrect (overly conservative) predicate.Chris Lattner2010-02-271-1/+1
| | | | llvm-svn: 97316
* fix grammaro's pointed out by danielChris Lattner2010-02-271-2/+2
| | | | llvm-svn: 97313
* Re-apply 97040 with fix. This survives a ppc self-host llvm-gcc bootstrap.Evan Cheng2010-02-273-25/+122
| | | | llvm-svn: 97310
* The TType is always absptr on Mach-O...at least for now.Bill Wendling2010-02-271-1/+1
| | | | llvm-svn: 97295
* fix PR6414, a nondeterminism issue in IPSCCP which was becauseChris Lattner2010-02-271-1/+15
| | | | | | of a subtle interation in a loop operating in densemap order. llvm-svn: 97288
* Fix rdar://7694996 a miscompile of 183.equake from my patch yesterday,Chris Lattner2010-02-261-3/+2
| | | | | | | | | | | | | confusing the old MAT variable with the new GlobalType one. This caused us to promote the @disp global pointer into: @disp.body = internal global double*** undef instead of: @disp.body = internal global [3 x double**] undef llvm-svn: 97285
* remove dead code, by this point all uses of CI are gone.Chris Lattner2010-02-261-4/+1
| | | | llvm-svn: 97283
* Make APFloat's string-parsing routines a bit safer against very large exponents.John McCall2010-02-261-2/+16
| | | | llvm-svn: 97278
* A much cleaner (and less code!) way of inserting the correct amount of paddingBill Wendling2010-02-261-50/+6
| | | | | | | | for alignment into the LSDA. If the TType base offset is emitted, then put the padding there. Otherwise, put it in the call site table length. There will be no conflict between the two sites when placing the padding in one place. llvm-svn: 97277
* Added the follwoing 32-bit Thumb instructions for disassembly only:Johnny Chen2010-02-263-5/+208
| | | | | | | | | | | | o Parallel addition and subtraction, signed/unsigned o Miscellaneous operations: QADD, QDADD, QSUB, QDSUB o Unsigned sum of absolute differences [and accumulate]: USAD8, USADA8 o Signed/Unsigned saturate: SSAT, SSAT16, USAT, USAT16 o Signed multiply accumulate long (halfwords): SMLAL<x><y> o Signed multiply accumulate/subtract [long] (dual): SMLAD[x], SMLALD[X], SMLSD[X], SMLSLD[X] o Signed dual multiply add/subtract [long]: SMUAD[X], SMUSD[X] llvm-svn: 97276
* Merge PPC instructions FMRS and FMRD into a single FMR instruction.Jakob Stoklund Olesen2010-02-262-17/+11
| | | | | | | | | This is possible because F8RC is a subclass of F4RC. We keep FMRSD around so fextend has a pattern. Also allow folding of memory operands on FMRSD. llvm-svn: 97275
* Comment typo.Bill Wendling2010-02-261-1/+1
| | | | llvm-svn: 97269
* Use the right floating point load/store instructions in ↵Jakob Stoklund Olesen2010-02-262-26/+18
| | | | | | | | | | | | | | | | | | PPCInstrInfo::foldMemoryOperandImpl(). The PowerPC floating point registers can represent both f32 and f64 via the two register classes F4RC and F8RC. F8RC is considered a subclass of F4RC to allow cross-class coalescing. This coalescing only affects whether registers are spilled as f32 or f64. Spill slots must be accessed with load/store instructions corresponding to the class of the spilled register. PPCInstrInfo::foldMemoryOperandImpl was looking at the instruction opcode which is wrong. X86 has similar floating point register classes, but doesn't try to fold memory operands, so there is no problem there. llvm-svn: 97262
* Remove dead codeJakob Stoklund Olesen2010-02-261-4/+0
| | | | llvm-svn: 97261
* Replace a temporary std::string with SmallString.Benjamin Kramer2010-02-261-1/+2
| | | | llvm-svn: 97259
* Move dbg_value generation to target-independent FastISel,Dale Johannesen2010-02-262-29/+28
| | | | | | as X86 is currently the only FastISel target. Per review. llvm-svn: 97255
* Add type printing for Metadata pseudo.Dale Johannesen2010-02-261-0/+1
| | | | llvm-svn: 97251
* Move the EnableFullLoadPRE flag from a separate command-line option to anBob Wilson2010-02-261-5/+6
| | | | | | argument of createGVNPass and set it automatically for -O3. llvm-svn: 97245
* Remove unused "NoPRE" parameter in GVN and createGVNPass().Bob Wilson2010-02-262-6/+5
| | | | llvm-svn: 97235
* pass in more section kinds, enough to get the .align 0x90Chris Lattner2010-02-261-5/+9
| | | | | | stuff to emit optimal nops in the right places. llvm-svn: 97233
* The cloner has nothing to do if any of the main or ISR entrypoints are not Sanjiv Gupta2010-02-261-0/+3
| | | | | | present in the module. llvm-svn: 97232
* fix PR6435 another bug from the MallocInst elimination work.Chris Lattner2010-02-261-3/+1
| | | | llvm-svn: 97231
* Reapply things reverted back in 97220, with the fixed test case.Sanjiv Gupta2010-02-264-18/+69
| | | | llvm-svn: 97228
* movl is a cheaper way to materialize 0 without clobbering EFLAGS than movabsq.Dan Gohman2010-02-261-1/+1
| | | | llvm-svn: 97227
* Fix XCoreTargetLowering::isLegalAddressingMode() to handle VoidTy.Richard Osborne2010-02-261-3/+1
| | | | | | | Previously LoopStrengthReduce would sometimes be unable to find a legal formula, causing an assertion failure. llvm-svn: 97226
* Revert r97211 and r97213 to get the build green again.Chandler Carruth2010-02-264-69/+16
| | | | llvm-svn: 97220
* Currently in LLVM, names of libcalls are assigned during TargetLoweringSanjiv Gupta2010-02-263-12/+51
| | | | | | | | object construction. There is no provision to change them when the code for a function generated. So we have to change these names while printing assembly. llvm-svn: 97213
* Before converting an operand to mem, check if it is legal to do so.Sanjiv Gupta2010-02-261-4/+18
| | | | llvm-svn: 97211
* Delete a bunch of redundant predicates.Dan Gohman2010-02-261-44/+41
| | | | llvm-svn: 97201
* Fix comments.Bill Wendling2010-02-261-3/+3
| | | | llvm-svn: 97200
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