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* The .n suffix must go after the predicate.Evan Cheng2009-11-041-1/+1
| | | | llvm-svn: 86019
* Fix CMake makefilesDouglas Gregor2009-11-041-0/+2
| | | | llvm-svn: 85994
* Use ldr.n to workaround a darwin assembler bug.Evan Cheng2009-11-041-1/+2
| | | | llvm-svn: 85980
* The Indexes Patch.Lang Hames2009-11-0315-965/+919
| | | | | | | | | | | | | | | | This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. llvm-svn: 85979
* Fix branch folding bug for indirect branches: for a block containing onlyBob Wilson2009-11-031-1/+2
| | | | | | | | | | | | | | | an unconditional branch (possibly from tail merging), this code is trying to redirect all of its predecessors to go directly to the branch target, but that isn't feasible for indirect branches. The other predecessors (that don't end with indirect branches) could theoretically still be handled, but that is not easily done right now. The AnalyzeBranch interface doesn't currently let us distinguish jump table branches from indirect branches, and this code is currently handling jump tables. To avoid punting on address-taken blocks, we would have to give up handling jump tables. That seems like a bad tradeoff. llvm-svn: 85975
* reimplement multiple return value handling in IPSCCP, making it Chris Lattner2009-11-031-125/+205
| | | | | | | more aggressive an correct. This survives building llvm in 64-bit mode with optimizations and the built llvm passes make check. llvm-svn: 85973
* Fix t2Int_eh_sjlj_setjmp. Immediate form of orr is a 32-bit instruction. So ↵Evan Cheng2009-11-032-2/+2
| | | | | | it should be 22 bytes instead of 20 bytes long. llvm-svn: 85965
* fconsts / fconstd immediate should be proceeded with #.Evan Cheng2009-11-031-2/+2
| | | | llvm-svn: 85952
* Re-apply 85799. It turns out my code isn't buggy.Evan Cheng2009-11-031-17/+46
| | | | llvm-svn: 85947
* Do a scheduling pass ignoring anti-dependencies to identify candidate ↵David Goodwin2009-11-039-61/+179
| | | | | | registers that should be renamed. llvm-svn: 85939
* finish half thunk thoughtChris Lattner2009-11-031-1/+3
| | | | llvm-svn: 85937
* Changes requested (avoid getFunction(), avoid Type creation via isVoidTy(), ↵Victor Hernandez2009-11-032-50/+13
| | | | | | and avoid redundant isFreeCall cases) in feedback to r85176 llvm-svn: 85936
* <rdar://problem/7352605>. When building schedule graph use mayAlias ↵David Goodwin2009-11-031-15/+43
| | | | | | information to avoid chaining loads/stores of spill slots with non-aliased memory ops. llvm-svn: 85934
* Changes (* location in pointer variables, avoiding include, and using ↵Victor Hernandez2009-11-031-39/+34
| | | | | | APInt::getLimitedValue) based on feedback to r85814 llvm-svn: 85933
* fix an IPSCCP bug I introduced when I changed IPSCCP to start working on Chris Lattner2009-11-031-19/+31
| | | | | | | | | | functions that don't have local linkage. Basically, we need to be more careful about propagating argument information to functions whose results we aren't tracking. This fixes a miscompilation of LLVMCConfigurationEmitter.cpp when built with an llvm-gcc that has ipsccp enabled. llvm-svn: 85923
* Make this code more robust by not thinking we are making progressDuncan Sands2009-11-031-1/+1
| | | | | | if zero bytes were read. llvm-svn: 85922
* Parse debug info attached with insertvalue and extractvalue instructions.Devang Patel2009-11-031-0/+11
| | | | llvm-svn: 85921
* Move subtarget check upper for NEON reg-reg fixup pass.Anton Korobeynikov2009-11-032-6/+4
| | | | llvm-svn: 85914
* Ignore unnamed variables.Devang Patel2009-11-031-1/+3
| | | | llvm-svn: 85909
* fix a subtle bug I introduced when refactoring SCCP. TestcaseChris Lattner2009-11-031-1/+1
| | | | | | to follow. llvm-svn: 85903
* Eliminate some temporaries.Benjamin Kramer2009-11-031-22/+11
| | | | llvm-svn: 85896
* Trim unnecessary include.Evan Cheng2009-11-031-1/+0
| | | | llvm-svn: 85878
* For Thumb indirect branches, use "mov pc, reg" which does not switchBob Wilson2009-11-031-1/+1
| | | | | | | between ARM/Thumb modes and does not require the low bit of the target address to be set for Thumb. llvm-svn: 85874
* Fix a funky "declared with greater visibility than the type of its field"Jeffrey Yasskin2009-11-031-2/+2
| | | | | | warning from gcc by removing VISIBILITY_HIDDEN attributes. llvm-svn: 85873
* Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.Evan Cheng2009-11-031-2/+9
| | | | llvm-svn: 85871
* Clean up copyRegToReg.Evan Cheng2009-11-031-27/+13
| | | | llvm-svn: 85870
* Add QPR_8 as a superreg class of SPR_8 and DPR_8.Evan Cheng2009-11-031-0/+7
| | | | llvm-svn: 85869
* remove unneeded checks of isFreeCallChris Lattner2009-11-031-16/+0
| | | | llvm-svn: 85866
* remove a check of isFreeCall: the argument to free is already nocapture so ↵Chris Lattner2009-11-031-4/+0
| | | | | | the generic call code works fine. llvm-svn: 85865
* remove a isFreeCall check: it is a callinst that can write to memory already.Chris Lattner2009-11-031-3/+2
| | | | llvm-svn: 85863
* Update CMake file.Ted Kremenek2009-11-031-1/+2
| | | | llvm-svn: 85861
* Alphabetize.Ted Kremenek2009-11-031-1/+1
| | | | llvm-svn: 85859
* turn IPSCCP back on now that the iterator invalidation bug is fixed.Chris Lattner2009-11-031-36/+50
| | | | llvm-svn: 85858
* Turn neon reg-reg moves fixup code into separate pass. This should reduce ↵Anton Korobeynikov2009-11-034-35/+152
| | | | | | the compile time. llvm-svn: 85850
* Revert r85049, it is causing PR5367Anton Korobeynikov2009-11-031-0/+2
| | | | llvm-svn: 85847
* Revert previous change to a comment. The BlockAddresses go in theBob Wilson2009-11-031-6/+6
| | | | | | constant pool so they don't get wrapped separately. llvm-svn: 85844
* fix a nasty iterator invalidation bug from my conversion fromChris Lattner2009-11-021-3/+2
| | | | | | std::map to DenseMap, exposed on release llvm-gcc bootstrap. llvm-svn: 85840
* Revert 85799 for now. It might be breaking llvm-gcc driver.Evan Cheng2009-11-021-46/+17
| | | | llvm-svn: 85827
* Put BlockAddresses into ARM constant pools.Bob Wilson2009-11-024-5/+19
| | | | llvm-svn: 85824
* Fix ARMAsmParser::ParseMemoryOffsetReg() where the parameter OffsetRegNum shouldKevin Enderby2009-11-021-2/+2
| | | | | | have been passed as a reference. llvm-svn: 85823
* revert r8579[56], which are causing unhappiness in buildbot land.Chris Lattner2009-11-021-50/+36
| | | | llvm-svn: 85818
* Set bit instead of calling pow() to compute 2 << nVictor Hernandez2009-11-021-5/+13
| | | | llvm-svn: 85814
* typoChris Lattner2009-11-021-1/+1
| | | | llvm-svn: 85812
* disable IPSCCP support for multiple return values, it is buggy, so justChris Lattner2009-11-021-1/+2
| | | | | | disable it until I can fix it. llvm-svn: 85810
* Fix schedule model for BFC.David Goodwin2009-11-022-2/+2
| | | | llvm-svn: 85809
* Hyphenate some comments.Bob Wilson2009-11-021-3/+2
| | | | llvm-svn: 85808
* Chain dependencies used to enforce memory order should have latency of 0 ↵David Goodwin2009-11-021-14/+23
| | | | | | (except for true dependency of Store followed by aliased Load... we estimate that case with a single cycle of latency assuming the hardware will bypass) llvm-svn: 85807
* Add support for BlockAddress values in ARM constant pools.Bob Wilson2009-11-024-20/+41
| | | | llvm-svn: 85806
* Prune unnecessary include.Bob Wilson2009-11-021-1/+0
| | | | llvm-svn: 85805
* Initilize the machine LICM CSE map upon the first time an instruction is ↵Evan Cheng2009-11-021-17/+46
| | | | | | | | | | hoisted to the loop preheader. Add instructions which are already in the preheader block that may be common expressions of those that are hoisted out. These does get a few more instructions CSE'ed. llvm-svn: 85799
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