| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | The .n suffix must go after the predicate. | Evan Cheng | 2009-11-04 | 1 | -1/+1 |
| | | | | | llvm-svn: 86019 | ||||
| * | Fix CMake makefiles | Douglas Gregor | 2009-11-04 | 1 | -0/+2 |
| | | | | | llvm-svn: 85994 | ||||
| * | Use ldr.n to workaround a darwin assembler bug. | Evan Cheng | 2009-11-04 | 1 | -1/+2 |
| | | | | | llvm-svn: 85980 | ||||
| * | The Indexes Patch. | Lang Hames | 2009-11-03 | 15 | -965/+919 |
| | | | | | | | | | | | | | | | | | This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. llvm-svn: 85979 | ||||
| * | Fix branch folding bug for indirect branches: for a block containing only | Bob Wilson | 2009-11-03 | 1 | -1/+2 |
| | | | | | | | | | | | | | | | | an unconditional branch (possibly from tail merging), this code is trying to redirect all of its predecessors to go directly to the branch target, but that isn't feasible for indirect branches. The other predecessors (that don't end with indirect branches) could theoretically still be handled, but that is not easily done right now. The AnalyzeBranch interface doesn't currently let us distinguish jump table branches from indirect branches, and this code is currently handling jump tables. To avoid punting on address-taken blocks, we would have to give up handling jump tables. That seems like a bad tradeoff. llvm-svn: 85975 | ||||
| * | reimplement multiple return value handling in IPSCCP, making it | Chris Lattner | 2009-11-03 | 1 | -125/+205 |
| | | | | | | | | more aggressive an correct. This survives building llvm in 64-bit mode with optimizations and the built llvm passes make check. llvm-svn: 85973 | ||||
| * | Fix t2Int_eh_sjlj_setjmp. Immediate form of orr is a 32-bit instruction. So ↵ | Evan Cheng | 2009-11-03 | 2 | -2/+2 |
| | | | | | | | it should be 22 bytes instead of 20 bytes long. llvm-svn: 85965 | ||||
| * | fconsts / fconstd immediate should be proceeded with #. | Evan Cheng | 2009-11-03 | 1 | -2/+2 |
| | | | | | llvm-svn: 85952 | ||||
| * | Re-apply 85799. It turns out my code isn't buggy. | Evan Cheng | 2009-11-03 | 1 | -17/+46 |
| | | | | | llvm-svn: 85947 | ||||
| * | Do a scheduling pass ignoring anti-dependencies to identify candidate ↵ | David Goodwin | 2009-11-03 | 9 | -61/+179 |
| | | | | | | | registers that should be renamed. llvm-svn: 85939 | ||||
| * | finish half thunk thought | Chris Lattner | 2009-11-03 | 1 | -1/+3 |
| | | | | | llvm-svn: 85937 | ||||
| * | Changes requested (avoid getFunction(), avoid Type creation via isVoidTy(), ↵ | Victor Hernandez | 2009-11-03 | 2 | -50/+13 |
| | | | | | | | and avoid redundant isFreeCall cases) in feedback to r85176 llvm-svn: 85936 | ||||
| * | <rdar://problem/7352605>. When building schedule graph use mayAlias ↵ | David Goodwin | 2009-11-03 | 1 | -15/+43 |
| | | | | | | | information to avoid chaining loads/stores of spill slots with non-aliased memory ops. llvm-svn: 85934 | ||||
| * | Changes (* location in pointer variables, avoiding include, and using ↵ | Victor Hernandez | 2009-11-03 | 1 | -39/+34 |
| | | | | | | | APInt::getLimitedValue) based on feedback to r85814 llvm-svn: 85933 | ||||
| * | fix an IPSCCP bug I introduced when I changed IPSCCP to start working on | Chris Lattner | 2009-11-03 | 1 | -19/+31 |
| | | | | | | | | | | | functions that don't have local linkage. Basically, we need to be more careful about propagating argument information to functions whose results we aren't tracking. This fixes a miscompilation of LLVMCConfigurationEmitter.cpp when built with an llvm-gcc that has ipsccp enabled. llvm-svn: 85923 | ||||
| * | Make this code more robust by not thinking we are making progress | Duncan Sands | 2009-11-03 | 1 | -1/+1 |
| | | | | | | | if zero bytes were read. llvm-svn: 85922 | ||||
| * | Parse debug info attached with insertvalue and extractvalue instructions. | Devang Patel | 2009-11-03 | 1 | -0/+11 |
| | | | | | llvm-svn: 85921 | ||||
| * | Move subtarget check upper for NEON reg-reg fixup pass. | Anton Korobeynikov | 2009-11-03 | 2 | -6/+4 |
| | | | | | llvm-svn: 85914 | ||||
| * | Ignore unnamed variables. | Devang Patel | 2009-11-03 | 1 | -1/+3 |
| | | | | | llvm-svn: 85909 | ||||
| * | fix a subtle bug I introduced when refactoring SCCP. Testcase | Chris Lattner | 2009-11-03 | 1 | -1/+1 |
| | | | | | | | to follow. llvm-svn: 85903 | ||||
| * | Eliminate some temporaries. | Benjamin Kramer | 2009-11-03 | 1 | -22/+11 |
| | | | | | llvm-svn: 85896 | ||||
| * | Trim unnecessary include. | Evan Cheng | 2009-11-03 | 1 | -1/+0 |
| | | | | | llvm-svn: 85878 | ||||
| * | For Thumb indirect branches, use "mov pc, reg" which does not switch | Bob Wilson | 2009-11-03 | 1 | -1/+1 |
| | | | | | | | | between ARM/Thumb modes and does not require the low bit of the target address to be set for Thumb. llvm-svn: 85874 | ||||
| * | Fix a funky "declared with greater visibility than the type of its field" | Jeffrey Yasskin | 2009-11-03 | 1 | -2/+2 |
| | | | | | | | warning from gcc by removing VISIBILITY_HIDDEN attributes. llvm-svn: 85873 | ||||
| * | Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8. | Evan Cheng | 2009-11-03 | 1 | -2/+9 |
| | | | | | llvm-svn: 85871 | ||||
| * | Clean up copyRegToReg. | Evan Cheng | 2009-11-03 | 1 | -27/+13 |
| | | | | | llvm-svn: 85870 | ||||
| * | Add QPR_8 as a superreg class of SPR_8 and DPR_8. | Evan Cheng | 2009-11-03 | 1 | -0/+7 |
| | | | | | llvm-svn: 85869 | ||||
| * | remove unneeded checks of isFreeCall | Chris Lattner | 2009-11-03 | 1 | -16/+0 |
| | | | | | llvm-svn: 85866 | ||||
| * | remove a check of isFreeCall: the argument to free is already nocapture so ↵ | Chris Lattner | 2009-11-03 | 1 | -4/+0 |
| | | | | | | | the generic call code works fine. llvm-svn: 85865 | ||||
| * | remove a isFreeCall check: it is a callinst that can write to memory already. | Chris Lattner | 2009-11-03 | 1 | -3/+2 |
| | | | | | llvm-svn: 85863 | ||||
| * | Update CMake file. | Ted Kremenek | 2009-11-03 | 1 | -1/+2 |
| | | | | | llvm-svn: 85861 | ||||
| * | Alphabetize. | Ted Kremenek | 2009-11-03 | 1 | -1/+1 |
| | | | | | llvm-svn: 85859 | ||||
| * | turn IPSCCP back on now that the iterator invalidation bug is fixed. | Chris Lattner | 2009-11-03 | 1 | -36/+50 |
| | | | | | llvm-svn: 85858 | ||||
| * | Turn neon reg-reg moves fixup code into separate pass. This should reduce ↵ | Anton Korobeynikov | 2009-11-03 | 4 | -35/+152 |
| | | | | | | | the compile time. llvm-svn: 85850 | ||||
| * | Revert r85049, it is causing PR5367 | Anton Korobeynikov | 2009-11-03 | 1 | -0/+2 |
| | | | | | llvm-svn: 85847 | ||||
| * | Revert previous change to a comment. The BlockAddresses go in the | Bob Wilson | 2009-11-03 | 1 | -6/+6 |
| | | | | | | | constant pool so they don't get wrapped separately. llvm-svn: 85844 | ||||
| * | fix a nasty iterator invalidation bug from my conversion from | Chris Lattner | 2009-11-02 | 1 | -3/+2 |
| | | | | | | | std::map to DenseMap, exposed on release llvm-gcc bootstrap. llvm-svn: 85840 | ||||
| * | Revert 85799 for now. It might be breaking llvm-gcc driver. | Evan Cheng | 2009-11-02 | 1 | -46/+17 |
| | | | | | llvm-svn: 85827 | ||||
| * | Put BlockAddresses into ARM constant pools. | Bob Wilson | 2009-11-02 | 4 | -5/+19 |
| | | | | | llvm-svn: 85824 | ||||
| * | Fix ARMAsmParser::ParseMemoryOffsetReg() where the parameter OffsetRegNum should | Kevin Enderby | 2009-11-02 | 1 | -2/+2 |
| | | | | | | | have been passed as a reference. llvm-svn: 85823 | ||||
| * | revert r8579[56], which are causing unhappiness in buildbot land. | Chris Lattner | 2009-11-02 | 1 | -50/+36 |
| | | | | | llvm-svn: 85818 | ||||
| * | Set bit instead of calling pow() to compute 2 << n | Victor Hernandez | 2009-11-02 | 1 | -5/+13 |
| | | | | | llvm-svn: 85814 | ||||
| * | typo | Chris Lattner | 2009-11-02 | 1 | -1/+1 |
| | | | | | llvm-svn: 85812 | ||||
| * | disable IPSCCP support for multiple return values, it is buggy, so just | Chris Lattner | 2009-11-02 | 1 | -1/+2 |
| | | | | | | | disable it until I can fix it. llvm-svn: 85810 | ||||
| * | Fix schedule model for BFC. | David Goodwin | 2009-11-02 | 2 | -2/+2 |
| | | | | | llvm-svn: 85809 | ||||
| * | Hyphenate some comments. | Bob Wilson | 2009-11-02 | 1 | -3/+2 |
| | | | | | llvm-svn: 85808 | ||||
| * | Chain dependencies used to enforce memory order should have latency of 0 ↵ | David Goodwin | 2009-11-02 | 1 | -14/+23 |
| | | | | | | | (except for true dependency of Store followed by aliased Load... we estimate that case with a single cycle of latency assuming the hardware will bypass) llvm-svn: 85807 | ||||
| * | Add support for BlockAddress values in ARM constant pools. | Bob Wilson | 2009-11-02 | 4 | -20/+41 |
| | | | | | llvm-svn: 85806 | ||||
| * | Prune unnecessary include. | Bob Wilson | 2009-11-02 | 1 | -1/+0 |
| | | | | | llvm-svn: 85805 | ||||
| * | Initilize the machine LICM CSE map upon the first time an instruction is ↵ | Evan Cheng | 2009-11-02 | 1 | -17/+46 |
| | | | | | | | | | | | hoisted to the loop preheader. Add instructions which are already in the preheader block that may be common expressions of those that are hoisted out. These does get a few more instructions CSE'ed. llvm-svn: 85799 | ||||

