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* [SelectionDAG] set dereferenceable flag when expanding memcpy/memmoveHiroshi Inoue2017-06-242-8/+43
| | | | | | | | | | When SelectionDAG expands memcpy (or memmove) call into a sequence of load and store instructions, it disregards dereferenceable flag even the source pointer is known to be dereferenceable. This results in an assertion failure if SelectionDAG commonizes a load instruction generated for memcpy with another load instruction for the source pointer. This patch makes SelectionDAG to set the dereferenceable flag for the load instructions properly to avoid the assertion failure. Differential Revision: https://reviews.llvm.org/D34467 llvm-svn: 306209
* [IR][AssumptionCache] Add m_Shift and m_BitwiseLogic matchers to replace a ↵Craig Topper2017-06-241-9/+2
| | | | | | | | | | | | | | | | | | | couple m_CombineOr Summary: m_CombineOr isn't very efficient. The code using it is also quite verbose. This patch adds m_Shift and m_BitwiseLogic matchers to make the using code more concise and improve the match efficiency. Reviewers: spatel, davide Reviewed By: davide Subscribers: davide, llvm-commits Differential Revision: https://reviews.llvm.org/D34593 llvm-svn: 306206
* [ValueTracking][InstCombine] Use m_Shr instead m_CombineOr(m_LShr, m_AShr). NFCCraig Topper2017-06-242-7/+3
| | | | llvm-svn: 306205
* [Analysis][Transforms] Use commutable matchers instead of m_CombineOr in a ↵Craig Topper2017-06-243-8/+4
| | | | | | few places. NFC llvm-svn: 306204
* Simplify the processFixupValue interface. NFC.Rafael Espindola2017-06-247-30/+16
| | | | llvm-svn: 306202
* Remove a processFixupValue hack.Rafael Espindola2017-06-242-35/+32
| | | | | | | | | | | The intention of processFixupValue is not to redefine the semantics of MCExpr. It is odd enough that a expression lowers to a PCRel MCExpr or not depending on what it looks like. At least it is a local hack now. I left a fix for anyone trying to figure out what producers should be producing a different expression. llvm-svn: 306200
* [InstCombine] Don't replace allocas with smaller globalsVitaly Buka2017-06-241-1/+14
| | | | | | | | | | | | | | | | | | Summary: InstCombine replaces large allocas with small globals consts causing buffer overflows on valid code, see PR33372. This fix permits this optimization only if the global is dereference for alloca size. Fixes PR33372 Reviewers: eugenis, majnemer, chandlerc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34311 llvm-svn: 306194
* Make visible isDereferenceableAndAlignedPointer(..., const APInt &Size, ...)Vitaly Buka2017-06-241-0/+10
| | | | | | | | | | | | Summary: Used by D34311 and D34467 Reviewers: hfinkel, efriedma Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34585 llvm-svn: 306193
* [WebAssembly] Fix build after r306177Derek Schuff2017-06-241-10/+14
| | | | llvm-svn: 306190
* Remove redundant argument.Rafael Espindola2017-06-2415-23/+24
| | | | llvm-svn: 306189
* [ORC] Re-apply r306166 and r306168 with fix for regression test.Lang Hames2017-06-234-27/+69
| | | | llvm-svn: 306182
* [llvm-pdbutil] Dump raw bytes of module symbols and debug chunks.Zachary Turner2017-06-231-8/+28
| | | | llvm-svn: 306179
* Move Value adjustment to applyFixup. NFC.Rafael Espindola2017-06-231-2/+1
| | | | llvm-svn: 306178
* ARM: move some logic from processFixupValue to applyFixup.Rafael Espindola2017-06-2315-50/+83
| | | | | | | | | | | | processFixupValue is called on every relaxation iteration. applyFixup is only called once at the very end. applyFixup is then the correct place to do last minute changes and value checks. While here, do proper range checks again for fixup_arm_thumb_bl. We used to do it, but dropped because of thumb2. We now do it again, but use the thumb2 range. llvm-svn: 306177
* This reverts commit r306166 and r306168.Rafael Espindola2017-06-233-51/+27
| | | | | | | | | Revert "[ORC] Remove redundant semicolons from DEFINE_SIMPLE_CONVERSION_FUNCTIONS uses." Revert "[ORC] Move ORC IR layer interface from addModuleSet to addModule and fix the module type as std::shared_ptr<Module>." They broke ExecutionEngine/OrcMCJIT/test-global-ctors.ll on linux. llvm-svn: 306176
* Reland r306095: [mips] Fix reg positions in the aui/daui instructionsPetar Jovanovic2017-06-231-3/+3
| | | | | | | | | | | | | | | | After fixing (r306173) a failing test in the lld test suite (r306173), reland r306095. Original commit message: [mips] Fix register positions in the aui/daui instructions Swapped the position of the rt and rs register in the aui/daui instructions for mips32r6 and mips64r6. With this change, the format of the generated instructions complies with specifications and GCC. Patch by Milos Stojanovic. llvm-svn: 306174
* [AArch64][Falkor] Remove some non-existent opcodes from sched detail ↵Geoff Berry2017-06-231-12/+12
| | | | | | regexes. NFC. llvm-svn: 306170
* [DebugInfo] Fix some Clang-tidy modernize-use-using and Include What You Use ↵Eugene Zelenko2017-06-237-35/+61
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 306169
* [ORC] Remove redundant semicolons from DEFINE_SIMPLE_CONVERSION_FUNCTIONS uses.Lang Hames2017-06-231-2/+2
| | | | llvm-svn: 306168
* [llvm-pdbutil] Dump raw bytes of type and id records.Zachary Turner2017-06-232-1/+18
| | | | llvm-svn: 306167
* [ORC] Move ORC IR layer interface from addModuleSet to addModule and fix theLang Hames2017-06-233-27/+51
| | | | | | module type as std::shared_ptr<Module>. llvm-svn: 306166
* Revert "[LoopDeletion] NFC: Move phi node value setting into prepass"Anna Thomas2017-06-231-13/+11
| | | | | | | | | This reverts commit r306157. It caused some timeouts in clang tests. Perhaps unreachable loops have far too many phi nodes. Reverting and investigating. llvm-svn: 306162
* [llvm-pdbutil] Dump raw bytes of various DBI stream subsections.Zachary Turner2017-06-231-16/+36
| | | | llvm-svn: 306160
* [MSP430] Fix data layout string.Vadzim Dambrouski2017-06-231-2/+6
| | | | | | | | | | | | | | | | Summary: Without this patch some types have incorrect size and/or alignment according to the MSP430 EABI. Reviewers: asl, awygle Reviewed By: asl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34561 llvm-svn: 306159
* [LoopDeletion] NFC: Move phi node value setting into prepassAnna Thomas2017-06-231-11/+13
| | | | | | | | | | Currently, the implementation of delete dead loops has a special case when the loop being deleted is never executed. This special case (updating of exit block's incoming values for phis) can be run as a prepass for non-executable loops before performing the actual deletion. llvm-svn: 306157
* [APInt] Move the single word cases of countTrailingZeros and ↵Craig Topper2017-06-231-7/+2
| | | | | | countLeadingOnes inline for consistency with countTrailingOnes and countLeadingZeros. NFCI llvm-svn: 306153
* [CorrelatedValuePropagation] Fix typo in comment sense->since. NFCCraig Topper2017-06-231-1/+1
| | | | llvm-svn: 306152
* [CorrelatedValuePropagation] Remove comment about iterating switch cases in ↵Craig Topper2017-06-231-2/+1
| | | | | | reverse order. This is no longer being done after r298791. NFC llvm-svn: 306151
* [llvm-pdbutil] Dump raw bytes of pdb name map.Zachary Turner2017-06-231-0/+8
| | | | | | | | This patch dumps the raw bytes of the pdb name map which contains the mapping of stream name to stream index for the string table and other reserved streams. llvm-svn: 306148
* Revert "[Hexagon] Handle decreasing of stack alignment in frame lowering"Krzysztof Parzyszek2017-06-234-51/+2
| | | | | | This breaks passing of aligned function arguments. llvm-svn: 306145
* [AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".Chad Rosier2017-06-236-3/+387
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains a pass that transforms CBZ/CBNZ/TBZ/TBNZ instructions into a conditional branch (Bcc), when the NZCV flags can be set for "free". This is preferred on targets that have more flexibility when scheduling Bcc instructions as compared to CBZ/CBNZ/TBZ/TBNZ (assuming all other variables are equal). This can reduce register pressure and is also the default behavior for GCC. A few examples: add w8, w0, w1 -> cmn w0, w1 ; CMN is an alias of ADDS. cbz w8, .LBB_2 -> b.eq .LBB0_2 ; single def/use of w8 removed. add w8, w0, w1 -> adds w8, w0, w1 ; w8 has multiple uses. cbz w8, .LBB1_2 -> b.eq .LBB1_2 sub w8, w0, w1 -> subs w8, w0, w1 ; w8 has multiple uses. tbz w8, #31, .LBB6_2 -> b.ge .LBB6_2 In looking at all current sub-target machine descriptions, this transformation appears to be either positive or neutral. Differential Revision: https://reviews.llvm.org/D34220. llvm-svn: 306144
* [X86] Fix SP adjustment in stack probes emitted on 32-bit Windows.whitequark2017-06-231-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit r306010 adjusted the condition as follows: - if (Is64Bit) { + if (!STI.isTargetWin32()) { The intent was to preserve the behavior on all Windows platforms but extend the behavior on 64-bit Windows platforms to every other one. (Before r306010, emitStackProbeCall only ever executed when emitting code for Windows triples.) Unfortunately, if (Is64Bit && STI.isOSWindows()) is not the same as if (!STI.isTargetWin32()) because of the way isTargetWin32() is defined: bool isTargetWin32() const { return !In64BitMode && (isTargetCygMing() || isTargetKnownWindowsMSVC()); } In practice this broke the JIT tests on 32-bit Windows, which did not satisfy the new condition: LLVM :: ExecutionEngine/MCJIT/2003-01-15-AlignmentTest.ll LLVM :: ExecutionEngine/MCJIT/2003-08-15-AllocaAssertion.ll LLVM :: ExecutionEngine/MCJIT/2003-08-23-RegisterAllocatePhysReg.ll LLVM :: ExecutionEngine/MCJIT/test-loadstore.ll LLVM :: ExecutionEngine/OrcMCJIT/2003-01-15-AlignmentTest.ll LLVM :: ExecutionEngine/OrcMCJIT/2003-08-15-AllocaAssertion.ll LLVM :: ExecutionEngine/OrcMCJIT/2003-08-23-RegisterAllocatePhysReg.ll LLVM :: ExecutionEngine/OrcMCJIT/test-loadstore.ll because %esp was not updated correctly. The failures are only visible on a MSVC 2017 Debug build, for which we do not have bots. llvm-svn: 306142
* [llvm-pdbutil] Add a function for formatting MSF data.Zachary Turner2017-06-231-0/+8
| | | | | | | | | | | | | | | | | | | The goal here is to make it possible to display absolute file offsets when dumping byets from an MSF. The problem is that when dumping bytes from an MSF, often the bytes will cross a block boundary and encounter a discontinuity. We can't use the normal formatBinary() function for this because this would just treat the sequence as entirely ascending, and not account out-of-order blocks. This patch adds a formatMsfData() function to our printer, and then uses this function to improve the output of the -stream-data command line option for dumping bytes from a particular stream. Test coverage is also expanded to make sure to include all possible scenarios of offsets, sizes, and crossing block boundaries. llvm-svn: 306141
* [Hexagon] Remove call to printAndVerify from HexagonPassConfigKrzysztof Parzyszek2017-06-231-1/+0
| | | | | | | It causes an extra pass of the machine verifier to be added to the pass manager, and causes test/CodeGen/Generic/llc-start-stop.ll to fail. llvm-svn: 306140
* [x86] fix value types for SBB transform (PR33560)Sanjay Patel2017-06-231-8/+13
| | | | | | | | | | | I'm not sure yet why this wouldn't fail in the simple case, but clearly I used the wrong value type with: https://reviews.llvm.org/rL306040 ...and the bug manifests with: https://bugs.llvm.org/show_bug.cgi?id=33560 llvm-svn: 306139
* Fix a misleading indentation warning.Peter Collingbourne2017-06-231-3/+3
| | | | llvm-svn: 306130
* Make the size specification for cache_size_bytes case insensitive.Peter Collingbourne2017-06-231-1/+1
| | | | llvm-svn: 306129
* Add a ThinLTO cache policy for controlling the maximum cache size in bytes.Peter Collingbourne2017-06-231-15/+46
| | | | | | | | | | | | | | This is useful when an upper limit on the cache size needs to be controlled independently of the amount of the amount of free space. One use case is a machine with a large number of cache directories (e.g. a buildbot slave hosting a large number of independent build jobs). By imposing an upper size limit on each cache directory, users can more easily estimate the server's capacity. Differential Revision: https://reviews.llvm.org/D34547 llvm-svn: 306126
* [Hexagon] Handle decreasing of stack alignment in frame loweringKrzysztof Parzyszek2017-06-234-2/+51
| | | | llvm-svn: 306124
* Add a BinarySubstreamRef, and a method to read one.Zachary Turner2017-06-231-0/+6
| | | | | | | | | This is essentially just a BinaryStreamRef packaged with an offset and the logic for reading one is no different than the logic for reading a BinaryStreamRef, except that we save the current offset. llvm-svn: 306122
* Remove trailing whitespace. NFCI.Simon Pilgrim2017-06-231-1/+1
| | | | llvm-svn: 306121
* GlobalISel: remove G_SEQUENCE instruction.Tim Northover2017-06-233-76/+1
| | | | | | | | It was trying to do too many things. The basic lumping together of values for legalization purposes is now handled by G_MERGE_VALUES. More complex things involving gaps and odd sizes are handled by G_INSERT sequences. llvm-svn: 306120
* GlobalISel: convert buildSequence to use non-deprecated instructions.Tim Northover2017-06-232-10/+26
| | | | | | | | G_SEQUENCE is going away soon so as a first step the MachineIRBuilder needs to be taught how to emulate it with alternatives. We use G_MERGE_VALUES where possible, and a sequence of G_INSERTs if not. llvm-svn: 306119
* [InlineCost] Do not take INT_MAX when Cost is negativeJun Bum Lim2017-06-231-5/+11
| | | | | | | | | | | | | | Summary: visitSwitchInst should not take INT_MAX when Cost is negative. Instead of INT_MAX , we also use a valid upperbound cost when overflow occurs in Cost. Reviewers: hans, echristo, dmgreen Reviewed By: dmgreen Subscribers: mcrosier, javed.absar, llvm-commits, eraman Differential Revision: https://reviews.llvm.org/D34436 llvm-svn: 306118
* [SystemZ] Remove unnecessary serialization before volatile loadsUlrich Weigand2017-06-234-17/+6
| | | | | | | | | | | | | | | | | This reverts the use of TargetLowering::prepareVolatileOrAtomicLoad introduced by r196905. Nothing in the semantics of the "volatile" keyword or the definition of the z/Architecture actually requires that volatile loads are preceded by a serialization operation, and no other compiler on the platform actually implements this. Since we've now seen a use case where this additional serialization causes noticable performance degradation, this patch removes it. The patch still leaves in the serialization before atomic loads, which is now implemented directly in lowerATOMIC_LOAD. (This also seems overkill, but that can be addressed separately.) llvm-svn: 306117
* AMDGPU/GlobalISel: Mark 32-bit G_AND as legalTom Stellard2017-06-231-0/+1
| | | | | | | | | | | | Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D34349 llvm-svn: 306112
* [SystemZ] Fix trap issue and enable expensive checks.Jonas Paulsson2017-06-232-8/+3
| | | | | | | | | | | | | | | | | | | | | | | The isBarrier/isTerminator flags have been removed from the SystemZ trap instructions, so that tests do not fail with EXPENSIVE_CHECKS. This was just an issue at -O0 and did not affect code output on benchmarks. (Like Eli pointed out: "targets are split over whether they consider their "trap" a terminator; x86, AArch64, and NVPTX don't, but ARM, MIPS, PPC, and SystemZ do. We should probably try to be consistent here.". This is still the case, although SystemZ has switched sides). SystemZ now returns true in isMachineVerifierClean() :-) These Generic tests have been modified so that they can be run with or without EXPENSIVE_CHECKS: CodeGen/Generic/llc-start-stop.ll and CodeGen/Generic/print-machineinstrs.ll Review: Ulrich Weigand, Simon Pilgrim, Eli Friedman https://bugs.llvm.org/show_bug.cgi?id=33047 https://reviews.llvm.org/D34143 llvm-svn: 306106
* [RuntimeLoopUnrolling] Rename exit block and move assert earlier. NFCAnna Thomas2017-06-231-23/+23
| | | | | | | The single exit block allowed in runtime unrolling is guaranteed to be the Latch's successor, so rename it as LatchExitBlock. llvm-svn: 306105
* [InstCombine] Recognize and simplify three way comparison idiomsAnna Thomas2017-06-232-4/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Many languages have a three way comparison idiom where comparing two values produces not a boolean, but a tri-state value. Typical values (e.g. as used in the lcmp/fcmp bytecodes from Java) are -1 for less than, 0 for equality, and +1 for greater than. We actually do a great job already of converting three way comparisons into binary comparisons when the result produced has one a single use. Unfortunately, such values can have more than one use, and in that case, our existing optimizations break down. The patch adds a peephole which converts a three-way compare + test idiom into a binary comparison on the original inputs. It focused on replacing the test on the result of the three way compare and does nothing about removing the three way compare itself. That's left to other optimizations (which do actually kick in commonly.) We currently recognize one idiom on signed integer compare. In the future, we plan to recognize and simplify other comparison idioms on other signed/unsigned datatypes such as floats, vectors etc. This is a resurrection of Philip Reames' original patch: https://reviews.llvm.org/D19452 Reviewers: majnemer, apilipenko, reames, sanjoy, mkazantsev Reviewed by: mkazantsev Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34278 llvm-svn: 306100
* Revert r306095: [mips] Fix reg positions in the aui/daui instructionsPetar Jovanovic2017-06-231-3/+3
| | | | | | | | | | | | | | | ELF/mips-plt-r6.s in lld-test is failing. Reverting the change. Original commit message: [mips] Fix register positions in the aui/daui instructions Swapped the position of the rt and rs register in the aut/daui instructions for mips32r6 and mips64r6. With this change, the format of the generated instructions complies with specifications and GCC. Patch by Milos Stojanovic. llvm-svn: 306099
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