| Commit message (Collapse) | Author | Age | Files | Lines |
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check that register isn't 0 before going further.
llvm-svn: 45498
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llvm-svn: 45496
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llvm-svn: 45494
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llvm-svn: 45493
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instruction. Also, use "splice" to move the new instruction instead of
remove/insert (where it was leaking memory anyway).
llvm-svn: 45492
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llvm-svn: 45485
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llvm-svn: 45484
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def of the vreg at the start of the list, so the list doesn't need to be traversed.
llvm-svn: 45483
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dereferencing
it now returns the machineinstr of the use. To get the operand, use I.getOperand().
Add a new MachineRegisterInfo::replaceRegWith, which is basically like
Value::replaceAllUsesWith.
llvm-svn: 45482
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Patch by Bryan O'Sullivan!
llvm-svn: 45481
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instruction that defines the specified vreg. Crazy.
llvm-svn: 45480
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operands. The lists are currently kept in MachineRegisterInfo, but it does
not yet provide an iterator interface to them.
llvm-svn: 45477
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version. It's unclear why gcc would ever compile this...
llvm-svn: 45476
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a header file from libcodegen. This violates a layering order: codegen
depends on target, not the other way around. The fix to this is to
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen. It is defined in libcodegen, where
the base is not.
llvm-svn: 45475
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values, which means doing extra legalization work.
It would be easier to get this kind of thing right if
there was some documentation...
llvm-svn: 45472
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Machine-level API cleanup instigated by Chris.
llvm-svn: 45470
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llvm-svn: 45469
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llvm-svn: 45468
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that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
llvm-svn: 45467
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e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
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- Eliminate the static "print" method for operands, moving it
into MachineOperand::print.
- Change various set* methods for register flags to take a bool
for the value to set it to. Remove unset* methods.
- Group methods more logically by operand flavor in MachineOperand.h
llvm-svn: 45461
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- Add getParent() accessors.
- Move SubReg out of the AuxInfo union, to make way for future changes.
- Remove the getImmedValue/setImmedValue methods.
- in some MachineOperand::Create* methods, stop initializing fields that are dead.
MachineInstr:
- Delete one copy of the MachineInstr printing code, now there is only one dump
format and one copy of the code.
- Make MachineOperand use the parent field to get info about preg register names if
no target info is otherwise available.
- Move def/use/kill/dead flag printing to the machineoperand printer, so they are
always printed for an operand.
llvm-svn: 45460
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llvm-svn: 45459
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llvm-svn: 45458
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knows how to print offsets.
llvm-svn: 45457
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llvm-svn: 45456
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llvm-svn: 45455
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llvm-svn: 45454
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Likewise setImmedValue -> setImm
llvm-svn: 45453
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llvm-svn: 45450
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machineinstr that owns it.
llvm-svn: 45449
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function, then go ahead and hoist it out of the loop. This is the result:
$ cat a.c
volatile int G;
int A(int N) {
for (; N > 0; --N)
G++;
}
$ llc -o - -relocation-model=pic
_A:
...
LBB1_2: # bb
movl L_G$non_lazy_ptr-"L1$pb"(%eax), %esi
incl (%esi)
incl %edx
cmpl %ecx, %edx
jne LBB1_2 # bb
...
$ llc -o - -relocation-model=pic -machine-licm
_A:
...
movl L_G$non_lazy_ptr-"L1$pb"(%eax), %eax
LBB1_2: # bb
incl (%eax)
incl %edx
cmpl %ecx, %edx
jne LBB1_2 # bb
...
I'm limiting this to the MOV32rm x86 instruction for now.
llvm-svn: 45444
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llvm-svn: 45437
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llvm-svn: 45436
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llvm-svn: 45435
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llvm-svn: 45433
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llvm-svn: 45432
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llvm-svn: 45428
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llvm-svn: 45418
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llvm-svn: 45415
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llvm-svn: 45408
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eliminating the llvm.x86.sse2.loadl.pd intrinsic?), one shuffle optzn
may be done (if shufps is better than pinsw, Evan, please review), and
we already know about LICM of simple instructions.
llvm-svn: 45407
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comparisons with a constant. This allows us to compile isnan to:
_foo:
fcmpu cr7, f1, f1
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr
instead of:
LCPI1_0: ; float
.space 4
_foo:
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr7, f1, f0
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr
llvm-svn: 45405
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llvm-svn: 45404
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should probably be a target-specific predicate based on address space. That way for targets where this isn't applicable the predicate can be optimized away.
llvm-svn: 45403
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llvm-svn: 45402
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as:
_bar:
pushl %esi
subl $8, %esp
movl 16(%esp), %esi
call L_foo$stub
fstps (%esi)
addl $8, %esp
popl %esi
#FP_REG_KILL
ret
instead of:
_bar:
pushl %esi
subl $8, %esp
movl 16(%esp), %esi
call L_foo$stub
fstpl (%esi)
cvtsd2ss (%esi), %xmm0
movss %xmm0, (%esi)
addl $8, %esp
popl %esi
#FP_REG_KILL
ret
llvm-svn: 45401
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llvm-svn: 45400
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if we are just going to store it back anyway. This improves things
like:
double foo();
void bar(double *P) { *P = foo(); }
llvm-svn: 45399
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x = load p
store x -> p
llvm-svn: 45398
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