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* ValueMapper: Fix unused var warning. NFCSimon Atanasyan2016-04-161-0/+2
| | | | llvm-svn: 266529
* Remove some unneeded headers and replace some headers with forward class ↵Mehdi Amini2016-04-166-4/+6
| | | | | | | | | | | declarations (NFC) Differential Revision: http://reviews.llvm.org/D19154 Patch by Eugene Kosov <claprix@yandex.ru> From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266524
* Add SVN version to libLLVMLTOMehdi Amini2016-04-161-0/+50
| | | | | | | | | | | | | | | | | | | | Summary: For Incremental LTO, we need to make sure that an old cache entry is not used when incrementally re-linking with a new libLTO. Adding a global LLVM_REVISION in llvm-config.h would for to rebuild/relink the world for every "git pull"/"svn update". So instead only libLTO is made dependent on the VCS and will be rebuilt (and the dependent binaries relinked, i.e. as of today: libLTO.dylib and llvm-lto). Reviewers: beanz Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D18987 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266523
* ThinLTO: Move the ODR resolution to be based purely on the summary.Mehdi Amini2016-04-163-85/+123
| | | | | | | | | This is a requirement for the cache handling in D18494 Differential Revision: http://reviews.llvm.org/D18908 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266519
* ThinLTO: Make aliases explicit in the summaryMehdi Amini2016-04-164-36/+173
| | | | | | | | | | | To be able to work accurately on the reference graph when taking decision about internalizing, promoting, renaming, etc. We need to have the alias information explicit. Differential Revision: http://reviews.llvm.org/D18836 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266517
* Do not modify a cl::opt programmatically, global mutable state is evil.Mehdi Amini2016-04-161-9/+13
| | | | | | | Found by TSAN on ThinLTO. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266514
* ValueMapper: Stop memoizing ConstantAsMetadataDuncan P. N. Exon Smith2016-04-161-9/+36
| | | | | | | | | | | | Stop memoizing ConstantAsMetadata in ValueMapper::mapMetadata. Now we have to recompute it, but these metadata aren't particularly common, and it restricts the lifetime of the Metadata map unnecessarily. (The motivation is that I have a patch which uses a single Metadata map for the lifetime of IRMover. Mehdi profiled r266446 with the patch applied and we saw a pretty big speedup in lib/Linker.) llvm-svn: 266513
* Reapply "ValueMapper: Eliminate cross-file co-recursion, NFC"Duncan P. N. Exon Smith2016-04-162-99/+327
| | | | | | | | | | | | | | | | | | | | | | | This reverts commit r266507, reapplying r266503 (and r266505 "ValueMapper: Use API from r266503 in unit tests, NFC") completely unchanged. I reverted because of a bot failure here: http://lab.llvm.org:8011/builders/lld-x86_64-freebsd/builds/16810/ However, looking more closely, the failure was from a host-compiler crash (clang 3.7.1) when building: lib/CodeGen/AsmPrinter/CMakeFiles/LLVMAsmPrinter.dir/DwarfAccelTable.cpp.o I didn't modify that file, or anything it includes, with that commit. The next build (which hadn't picked up my revert) got past it: http://lab.llvm.org:8011/builders/lld-x86_64-freebsd/builds/16811/ I think this was just unfortunate timing. I suppose the bot must be flakey. llvm-svn: 266510
* AMDGPU: Enable LocalStackSlotAllocation passMatt Arsenault2016-04-162-0/+159
| | | | | | | | | | | This resolves more frame indexes early and folds the immediate offsets into the scratch mubuf instructions. This cleans up a lot of the mess that's currently emitted, such as emitting add 0s and repeatedly initializing the same register to 0 when spilling. llvm-svn: 266508
* Revert "ValueMapper: Eliminate cross-file co-recursion, NFC"Duncan P. N. Exon Smith2016-04-162-327/+99
| | | | | | | | | | | | This reverts commit r266503, in case it's the root cause of this bot failure: http://lab.llvm.org:8011/builders/lld-x86_64-freebsd/builds/16810 I'm also reverting r266505 -- "ValueMapper: Use API from r266503 in unit tests, NFC" -- since it's in the way. llvm-svn: 266507
* AMDGPU: Use s_addk_i32 / s_mulk_i32Matt Arsenault2016-04-161-12/+45
| | | | llvm-svn: 266506
* ValueMapper: Eliminate cross-file co-recursion, NFCDuncan P. N. Exon Smith2016-04-162-99/+327
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Eliminate co-recursion of Mapper::mapValue through ValueMaterializer::materializeInitFor, through a major redesign of the ValueMapper.cpp interface. - Expose a ValueMapper class that controls the entry points to the mapping algorithms. - Change IRLinker to use ValueMapper directly, rather than llvm::RemapInstruction, llvm::MapValue, etc. - Use (e.g.) ValueMapper::scheduleMapGlobalInit to add mapping work to a worklist in ValueMapper instead of recursing. There were two fairly major complications. Firstly, IRLinker::linkAppendingVarProto incorporates an on-the-fly IR ugprade that I had to split apart. Long-term, this upgrade should be done in the bitcode reader (and we should only accept the "new" form), but for now I've just made it work and added a FIXME. The hold-op is that we need to deprecate C API that relies on this. Secondly, IRLinker has special logic to correctly implement aliases with comdats, and uses two ValueToValueMapTy instances and two ValueMaterializers. I supported this by allowing clients to register an alternate mapping context, whose MCID can be passed in when scheduling new work. While out of scope for this commit, it should now be straightforward to remove recursion from Mapper::mapValue. llvm-svn: 266503
* Update and fix LLVM_ENABLE_MODULES:Richard Smith2016-04-166-6/+0
| | | | | | | | | | | | | | | | 1) We need to add this flag prior to adding any other, in case the user has specified a -fmodule-cache-path= flag in their custom CXXFLAGS. Such a flag causes -Werror builds to fail, and thus all config checks fail, until we add the corresponding -fmodules flag. The modules selfhost bot does this, for instance. 2) Delete module maps that were putting .cpp files into modules. 3) Enable -fmodules-local-submodule-visibility, to get proper module visibility rules applied across submodules of the same module. Disable -fmodules for C builds, since that flag is not available there. llvm-svn: 266502
* Linker: Remove an unnecessary local variable in for loop, NFCDuncan P. N. Exon Smith2016-04-151-6/+4
| | | | | | Reduces changes in a follow-up commit. llvm-svn: 266493
* ValueMapper: Hide Mapper::VM behind an accessor, NFCDuncan P. N. Exon Smith2016-04-151-29/+32
| | | | | | | | | Change Mapper::VM to a pointer and add a `getVM()` accessor for it. While this has no functionality change, it minimizes the diff on an upcoming patch that allows switching between instances of ValueToValueMapTy on a single Mapper instance. llvm-svn: 266490
* Don't skip splitSeparateComponents in eliminateDeadDefs for ↵Wei Mi2016-04-152-17/+23
| | | | | | | | | | | | | | | | | | HoistSpillHelper::hoistAllSpills. Because HoistSpillHelper::hoistAllSpills is called in postOptimization, before the patch we didn't want LiveRangeEdit::eliminateDeadDefs to call splitSeparateComponents and generate unassigned new vregs. However, skipping splitSeparateComponents will make verify-machineinstrs unhappy, so I remove the early return, and use HoistSpillHelper::LRE_DidCloneVirtReg to assign physreg/stackslot for those new vregs. In addition, some code reorganization to make class HoistSpillHelper privately inheriting from LiveRangeEdit::Delegate possible. This is to be consistent with class RAGreedy and class RegisterCoalescer. Differential Revision: http://reviews.llvm.org/D19142 llvm-svn: 266489
* Add ProfileData to required_librariesEaswaran Raman2016-04-151-1/+1
| | | | | | This should fix ppc64be build breakage due to r266477 llvm-svn: 266488
* [cfi] Support explicit sections for functions in cfi-icall.Evgeniy Stepanov2016-04-151-2/+3
| | | | | | | | | | Allow explicit section for indirectly called functions in cfi-icall. Jumptables for functions in the same type class must be contiguous, so they always go to the default text section. Fixes PR25079. llvm-svn: 266486
* [libFuzzer] add a better warning for command line flags with -- (two dashes)Kostya Serebryany2016-04-152-0/+5
| | | | llvm-svn: 266480
* Switch lowering: don't add incoming PHI values from skipped bit test MBB's ↵Hans Wennborg2016-04-151-12/+26
| | | | | | | | | | | (PR27135) After r245976, LLVM will skip the last bit test case if knows it will always be true. However, we would still erroneously update PHI nodes with incoming values from the MBB that would perform the final bit test, causing -verify-machineinstrs to fail. llvm-svn: 266479
* SelectionDAGISel: rangeify a loopHans Wennborg2016-04-151-23/+20
| | | | llvm-svn: 266478
* Replace the use of MaxFunctionCount module flagEaswaran Raman2016-04-152-2/+48
| | | | | | | | Adds an interface to get ProfileSummary for a module and makes InlineCost use ProfileSummary to get max function count. Differential Revision: http://reviews.llvm.org/D18622 llvm-svn: 266477
* [mips] More range-based for loops. NFC.Vasileios Kalintiris2016-04-153-10/+9
| | | | | | | There are still a couple more inside the MIPS target. I opted for a single commit in order to avoid spamming the list. llvm-svn: 266472
* [mips] Use range-based for loops and simplify slightly the code. NFC.Vasileios Kalintiris2016-04-151-9/+13
| | | | llvm-svn: 266471
* [SystemZ] Call tryAddingSymbolicOperand in the disassemblerUlrich Weigand2016-04-152-11/+52
| | | | | | | | | | Use the tryAddingSymbolicOperand callback to attempt to present immediate values in symbolic form when disassembling. This is currently only used for PC-relative immediates (which are most likely to be symbolic in the SystemZ ISA). Add new DecodeMethod types to allow distinguishing between branch and non-branch instructions. llvm-svn: 266469
* ARM: don't try to hoist constant RHS out of a division.Tim Northover2016-04-152-3/+16
| | | | | | | | | | | | Divisions by a constant can be converted into multiplies which are usually cheaper, but this isn't possible if the constant gets separated (particularly in loops). Fix this by telling ConstantHoisting that the immediate in a DIV is cheap. I considered making the check generic, but neither AArch64 (strangely) nor x86 showed any benefit on the tests I had. llvm-svn: 266464
* [AArch64] Add load/store pair instructions to getMemOpBaseRegImmOfsWidth().Chad Rosier2016-04-151-5/+46
| | | | | | | | | This improves AA in the MI schduler when reason about paired instructions. Phabricator Revision: http://reviews.llvm.org/D17098 PR26358 llvm-svn: 266462
* Revert "[Coverage] Prevent detection of false instantiations in case of ↵Igor Kudrin2016-04-151-12/+18
| | | | | | | | macro expansion." This reverts commit r266436 as it broke buildbot. llvm-svn: 266458
* [ParallelCG] Add a new splitCodeGen() API which takes a TargetMachineFactory.Davide Italiano2016-04-151-21/+27
| | | | | | | | This is a recommit of r266390 with a fix that will allow tests to pass (hopefully). Before we got a StringRef to M->getTargetTriple() and right after we moved the Module so we were referencing a dangling object. llvm-svn: 266456
* [InstCombine] Don't transform compares of calls to functions named fabs{f,l,}David Majnemer2016-04-151-30/+25
| | | | | | | | InstCombine wants to optimize compares of calls to fabs with zero. However, we didn't have the necessary legality checking to verify that the function call had the same behavior as fabs. llvm-svn: 266452
* [PR27284] Reverse the ownership between DICompileUnit and DISubprogram.Adrian Prantl2016-04-1515-273/+173
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently each Function points to a DISubprogram and DISubprogram has a scope field. For member functions the scope is a DICompositeType. DIScopes point to the DICompileUnit to facilitate type uniquing. Distinct DISubprograms (with isDefinition: true) are not part of the type hierarchy and cannot be uniqued. This change removes the subprograms list from DICompileUnit and instead adds a pointer to the owning compile unit to distinct DISubprograms. This would make it easy for ThinLTO to strip unneeded DISubprograms and their transitively referenced debug info. Motivation ---------- Materializing DISubprograms is currently the most expensive operation when doing a ThinLTO build of clang. We want the DISubprogram to be stored in a separate Bitcode block (or the same block as the function body) so we can avoid having to expensively deserialize all DISubprograms together with the global metadata. If a function has been inlined into another subprogram we need to store a reference the block containing the inlined subprogram. Attached to https://llvm.org/bugs/show_bug.cgi?id=27284 is a python script that updates LLVM IR testcases to the new format. http://reviews.llvm.org/D19034 <rdar://problem/25256815> llvm-svn: 266446
* [SimplifyCFG] propagate branch metadata when creating select (PR27344)Sanjay Patel2016-04-151-2/+2
| | | | | | | | | | This is almost identical to: http://reviews.llvm.org/rL264527 This doesn't solve PR27344; it just allows the profile weights to survive. To solve the bug, we need to use the profile weights in the backend. llvm-svn: 266442
* [AArch64] Add MMOs to callee-save load/store instructions.Geoff Berry2016-04-151-2/+15
| | | | | | | | | | | | | | Summary: Without MMOs, the callee-save load/store instructions were treated as volatile by the MI post-RA scheduler and AArch64LoadStoreOptimizer. Reviewers: t.p.northover, mcrosier Subscribers: aemerson, rengolin, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D17661 llvm-svn: 266439
* Fix typing on generated LXV2DX/STXV2DX instructionsNirav Dave2016-04-151-5/+23
| | | | | | | | | | | | | | | | | [PPC] Previously when casting generic loads to LXV2DX/ST instructions we would leave the original load return type in place allowing for an assertion failure when we merge two equivalent LXV2DX nodes with different types. This fixes PR27350. Reviewers: nemanjai Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D19133 llvm-svn: 266438
* [MachineScheduler]Add support for store clusteringJun Bum Lim2016-04-155-45/+82
| | | | | | | | | | | | Perform store clustering just like load clustering. This change add StoreClusterMutation in machine-scheduler. To control StoreClusterMutation, added enableClusterStores() in TargetInstrInfo.h. This is enabled only on AArch64 for now. This change also add support for unscaled stores which were not handled in getMemOpBaseRegImmOfs(). llvm-svn: 266437
* [Coverage] Prevent detection of false instantiations in case of macro expansion.Igor Kudrin2016-04-151-18/+12
| | | | | | | | | | | | | The root of the problem was that findMainViewFileID(File, Function) could return some ID for any given file, even though that file was not the main file for that function. This patch ensures that the result of this function is conformed with the result of findMainViewFileID(Function). Differential Revision: http://reviews.llvm.org/D18787 llvm-svn: 266436
* AMDGPU/SI: Fix regression with no-return atomicsNicolai Haehnle2016-04-151-0/+1
| | | | | | | | | | | | | | | Summary: In the added test-case, the atomic instruction feeds into a non-machine CopyToReg node which hasn't been selected yet, so guard against non-machine opcodes here. Reviewers: arsenm, tstellarAMD Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19043 llvm-svn: 266433
* Use MVT instead of EVT to remove a bunch of unnecessary calls to getSimpleVT.Craig Topper2016-04-154-61/+58
| | | | llvm-svn: 266414
* Add a setOperationPromotedToType convenience method that sets an operation ↵Craig Topper2016-04-151-36/+18
| | | | | | to promoted and set the type in one call. Use it so save code in X86. llvm-svn: 266413
* [X86] AND, OR, and XOR of vectors are always legal no need to set them legal ↵Craig Topper2016-04-151-5/+0
| | | | | | explicitly. llvm-svn: 266412
* [X86] Combine an if and else block that had the same set of calls to ↵Craig Topper2016-04-151-47/+24
| | | | | | setOperationAction that only varied in Legal/Custom. Use the ternary operator on that argument instead. NFC llvm-svn: 266410
* Revert "[LTO] Add a new splitCodeGen() API which takes a TargetMachineFactory."Davide Italiano2016-04-151-26/+20
| | | | | | This reverts commits r266390 and r266396 as they broke some bots. llvm-svn: 266408
* [NVPTX] Set NVPTXTTI::getInliningThresholdMultiplier to 5.Justin Lebar2016-04-151-0/+4
| | | | | | | | | | | | | | | Summary: Calls on NVPTX are unusually expensive (for one thing, lots of state needs to be saved to memory, which is slow), so make the inlininer much more aggressive. Reviewers: chandlerc Subscribers: jholewinski, llvm-commits, tra Differential Revision: http://reviews.llvm.org/D18561 llvm-svn: 266406
* [TTI] Add getInliningThresholdMultiplier.Justin Lebar2016-04-152-0/+8
| | | | | | | | | | | | | | | | Summary: InlineCost's threshold is multiplied by this value. This lets us adjust the inlining threshold up or down on a per-target basis. For example, we might want to increase the threshold on targets where calls are unusually expensive. Reviewers: chandlerc Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D18560 llvm-svn: 266405
* [ifcnv] Don't duplicate blocks that contain convergent instructions.Justin Lebar2016-04-151-1/+31
| | | | | | | | | | | It's unsafe to duplicate blocks that contain convergent instructions during ifcnv. See the patch for details. Reviewers: hfinkel Differential Revision: http://reviews.llvm.org/D17518 llvm-svn: 266404
* [PM] Add a SpeculativeExecution pass for targets with divergent branches.Justin Lebar2016-04-151-0/+2
| | | | | | | | | | | | | | Summary: This IR pass is helpful for GPUs, and other targets with divergent branches. It's a nop on targets without divergent branches. Reviewers: chandlerc Subscribers: llvm-commits, jingyue, rnk, joker.eph, tra Differential Revision: http://reviews.llvm.org/D18626 llvm-svn: 266399
* [Speculation] Add a SpeculativeExecution mode where the pass does nothing ↵Justin Lebar2016-04-151-5/+43
| | | | | | | | | | | | | | | | unless TTI::hasBranchDivergence() is true. Summary: This lets us add this pass to the IR pass manager unconditionally; it will simply not do anything on targets without branch divergence. Reviewers: tra Subscribers: llvm-commits, jingyue, rnk, chandlerc Differential Revision: http://reviews.llvm.org/D18625 llvm-svn: 266398
* Option parser: class for consuming a joined arg in addition to all remaining ↵Hans Wennborg2016-04-152-1/+15
| | | | | | args llvm-svn: 266394
* [LTO] Add a new splitCodeGen() API which takes a TargetMachineFactory.Davide Italiano2016-04-151-20/+26
| | | | | | | | | This will be used in lld to avoid creating TargetMachine in two different places. See D18999 for a more detailed discussion. Differential Revision: http://reviews.llvm.org/D19139 llvm-svn: 266390
* AMDGPU: Remove custom load/store scalarizationMatt Arsenault2016-04-144-87/+7
| | | | llvm-svn: 266385
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