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* Add support to preserve type info for the variables that are removed by the ↵Devang Patel2010-05-143-16/+42
| | | | | | optimizer. llvm-svn: 103798
* When verifying two-address instructions, check the following:Jakob Stoklund Olesen2010-05-142-12/+21
| | | | | | | | | - Kill is implicit when use and def registers are identical. - Only virtual registers can differ. Add a -verify-fast-regalloc to run the verifier before the fast allocator. llvm-svn: 103797
* Fix so "int3" is correctly accepted, added "into" and fixed "int" with anKevin Enderby2010-05-141-2/+4
| | | | | | argument, like "int $4", to not get an Assertion error. llvm-svn: 103791
* Model VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE.Evan Cheng2010-05-142-26/+88
| | | | llvm-svn: 103790
* MC/Mach-O/x86_64: Darwin's special "signed_N" relocation types should only beDaniel Dunbar2010-05-141-23/+23
| | | | | | used to replace a normal relocation, not a reference to a GOT entry. llvm-svn: 103789
* Simplify the handling of physreg defs and uses in RegAllocFast.Jakob Stoklund Olesen2010-05-141-109/+72
| | | | | | | This adds extra security against using clobbered physregs, and it adds kill markers to physreg uses. llvm-svn: 103784
* Set isTerminator on TRAP instructions.Dan Gohman2010-05-142-2/+2
| | | | llvm-svn: 103778
* Don't use isBarrier for the PowerPC sync instruction. isBarrier is forDan Gohman2010-05-141-1/+0
| | | | | | control barriers, not memory ordering barriers. llvm-svn: 103777
* Add mayLoad and mayStore flags to instructions which missed them.Dan Gohman2010-05-142-2/+15
| | | | llvm-svn: 103776
* XFAIL the test I added with vg_leak, apparently it is the first and only llcDaniel Dunbar2010-05-141-0/+2
| | | | | | | -filetype=obj test, and -filetype=obj leaks a few objects. Added a FIXME, we need to sort out the ownership model for the various MC objects. llvm-svn: 103769
* Inline Asm: Ensure buffer is newline terminated to match how the text is ↵Daniel Dunbar2010-05-141-0/+14
| | | | | | | | printed. - This is a hack, but I can't decide the best place to handle this. Chris? llvm-svn: 103765
* Enable opportunistic coalescingJakob Stoklund Olesen2010-05-141-7/+18
| | | | llvm-svn: 103764
* Added a QQQQ register file to model 4-consecutive Q registers.Evan Cheng2010-05-146-52/+189
| | | | llvm-svn: 103760
* Add AsmParser support for darwin tbss directive.Eric Christopher2010-05-144-1/+84
| | | | | | Nothing uses this yet. llvm-svn: 103757
* Fix a couple of typos.Eric Christopher2010-05-141-2/+2
| | | | llvm-svn: 103756
* MC: Switch to completely lazy layout.Daniel Dunbar2010-05-141-19/+35
| | | | | | - The eliminates the last major algorithmic problem with MC. llvm-svn: 103754
* MC: Extend MCAsmLayout to explicitly track which fragments have been layed ↵Daniel Dunbar2010-05-141-10/+44
| | | | | | out, and enforce several invariants to LayoutFragment to ensure we only do layout in a sensible order. llvm-svn: 103753
* MC: Implicitly assign section addresses when the previous fragment is layed out.Daniel Dunbar2010-05-141-1/+11
| | | | llvm-svn: 103752
* MC: Switch MCFragment to storing the layout order index, not its index in ↵Daniel Dunbar2010-05-141-13/+14
| | | | | | the file. llvm-svn: 103751
* MC: Change LayoutSection() to only do the section initializiation.Daniel Dunbar2010-05-141-25/+13
| | | | | | Also, elimminate MCAsmLayout::set*, which are no longer needed. llvm-svn: 103750
* Fix comments.Evan Cheng2010-05-141-2/+2
| | | | llvm-svn: 103749
* Trust kill flags from isel and later passes.Jakob Stoklund Olesen2010-05-141-4/+0
| | | | llvm-svn: 103748
* Fix an embarrassing runtime regression for RegAllocFast.Jakob Stoklund Olesen2010-05-141-9/+31
| | | | | | | | | | | | This loop is quadratic in the capacity for a DenseMap: while(!map.empty()) map.erase(map.begin()); Instead we now do a normal begin() - end() iteration followed by map.clear(). That also has the nice sideeffect of shrinking the map capacity on demand. llvm-svn: 103747
* Adding a v8i64 512-bit vector type. This will be used to model ARM NEON ↵Evan Cheng2010-05-131-0/+6
| | | | | | intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers. llvm-svn: 103746
* Implement a correct ui64->f32 conversion. The oldDale Johannesen2010-05-131-0/+36
| | | | | | one was subject to double rounding in extreme cases. llvm-svn: 103744
* Clean up RegAllocFast debug outputJakob Stoklund Olesen2010-05-131-15/+14
| | | | llvm-svn: 103739
* MC: Move Layout{Fragment,Section} into MCAsmLayout, and add LayoutFile().Daniel Dunbar2010-05-131-26/+27
| | | | llvm-svn: 103738
* Teach MachineLICM and MachineSink how to clear kill flags conservativelyDan Gohman2010-05-133-1/+27
| | | | | | when they move instructions. llvm-svn: 103737
* Add comment about the pseudo registers QQ, each of which is a pair of Q ↵Evan Cheng2010-05-131-0/+5
| | | | | | registers. llvm-svn: 103731
* Fix pr7110: For non-Darwin targets UnspilledCS1GPRs may include high registers.Bob Wilson2010-05-131-1/+3
| | | | | | Do not use those for Thumb1 functions. llvm-svn: 103730
* CMake: fixes 64 bit Visual Studio IDE build. Fixes bug 4936.Oscar Fuentes2010-05-131-1/+6
| | | | | | Patch by Dimitry Andric! llvm-svn: 103727
* Add a utility function for conservatively clearing kill flags, and makeDan Gohman2010-05-132-1/+13
| | | | | | use of it in MachineCSE. llvm-svn: 103726
* An Instruction has a trivial kill only if its use is in the sameDan Gohman2010-05-131-2/+5
| | | | | | basic block. llvm-svn: 103725
* MC: Factor out MCAssembler::ComputeFragmentSize.Daniel Dunbar2010-05-131-36/+44
| | | | llvm-svn: 103724
* MC: Add section layout order indices to MCSectionData.Daniel Dunbar2010-05-131-0/+4
| | | | llvm-svn: 103715
* MC: Move ordinal calculation, to make sure fragments synthesized for layout ↵Daniel Dunbar2010-05-131-21/+21
| | | | | | get assigned ordinals properly. llvm-svn: 103711
* MC: Create dummy fragments to avoid ever having empty sections, which ↵Daniel Dunbar2010-05-131-8/+9
| | | | | | simplifies layout. llvm-svn: 103710
* MC: Add MCAsmLayout::FragmentReplaced() helper function.Daniel Dunbar2010-05-131-4/+6
| | | | llvm-svn: 103709
* Properly set thread-local flag on globals during cpp emissionAnton Korobeynikov2010-05-131-0/+5
| | | | llvm-svn: 103702
* Remove heinous tabs.Nick Lewycky2010-05-131-7/+7
| | | | llvm-svn: 103700
* Replace the core comparison login in merge functions. We can now mergeNick Lewycky2010-05-131-192/+276
| | | | | | | | | | | | | | | | | | | | | | | | vector<>::push_back() in: int foo(vector<int> &a, vector<unsigned> &b) { a.push_back(10); b.push_back(11); } to two calls to the same push_back function, or fold away the two copies of push_back() in: struct T { int; }; struct S { char; }; vector<T*> t; vector<S*> s; void f(T *x) { t.push_back(x); } void g(S *x) { s.push_back(x); } but leave f() and g() separate, since they refer to two different global variables. llvm-svn: 103698
* Fix -Asserts warning.Daniel Dunbar2010-05-131-4/+2
| | | | llvm-svn: 103697
* MC: Eliminate MCSectionData::{,Address,File}Size, which can now be computed byDaniel Dunbar2010-05-131-42/+28
| | | | | | utility functions. llvm-svn: 103695
* Fix -Asserts warning.Daniel Dunbar2010-05-131-0/+1
| | | | llvm-svn: 103694
* MC: Switch to using explicit MCAlignFragments with OnlyAlignAddress bit insteadDaniel Dunbar2010-05-131-22/+31
| | | | | | | | of manually doing padding/editing layout in LayoutSection(). - This probably seems like six-of-one and half-dozen of another, but there is a method to my madness. llvm-svn: 103693
* Bring back VLD1q and VST1q and use them for reloading / spilling Q ↵Evan Cheng2010-05-132-29/+83
| | | | | | registers. This allows folding loads and stores into VMOVQ. llvm-svn: 103692
* MC: Add MCAlignFragment::OnlyAlignAddress bit. This is a bit of magic that ↵Daniel Dunbar2010-05-131-1/+17
| | | | | | says the align fragment shouldn't contribute to the logical section size, it is will be used for cleaning up the code to handle section alignment. llvm-svn: 103690
* MC: Add MCSectionData::AddressSize, which is the size of the address space ↵Daniel Dunbar2010-05-131-6/+15
| | | | | | consumed by the section. This can differ from both the section logical size, and the section size on disk (although the current code handles this without making an explicit distinction). llvm-svn: 103689
* Take allocation hints from copy instructions to/from physregs.Jakob Stoklund Olesen2010-05-131-18/+68
| | | | | | This causes way more identity copies to be generated, ripe for coalescing. llvm-svn: 103686
* More asserts around physreg usesJakob Stoklund Olesen2010-05-131-1/+11
| | | | llvm-svn: 103685
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