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* Remove VLD1q and VST1q for reloading and spilling Q registers. Just use ↵Evan Cheng2010-05-072-32/+23
| | | | | | VLD1q64 / VST1q64 and reference sub-registers. llvm-svn: 103218
* MC/X86: X86AbsMemAsmOperand is subclass of X86NoSegMemAsmOperand.Daniel Dunbar2010-05-061-4/+4
| | | | | | - This fixes "leal 0, %eax", for example. llvm-svn: 103205
* fix rdar://7947167 - llvm-mc doesn't match movsqChris Lattner2010-05-061-4/+10
| | | | llvm-svn: 103199
* Eliminated the classification of control registers into %ecr_Sean Callanan2010-05-067-64/+32
| | | | | | | | | and %rcr_, leaving just %cr_ which is what people expect. Updated the disassembler to support this unified register set. Added a testcase to verify that the registers continue to be decoded correctly. llvm-svn: 103196
* MC/X86: Error out if we see a non-constant FK_Data_1 or FK_Data_2 fixup, sinceDaniel Dunbar2010-05-061-2/+14
| | | | | | we don't currently support relaxing them. llvm-svn: 103195
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-0644-118/+137
| | | | | | doesn't have to guess. llvm-svn: 103194
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-0637-109/+178
| | | | llvm-svn: 103193
* 80 col violation.Evan Cheng2010-05-061-2/+2
| | | | llvm-svn: 103185
* Add a missing break statement to fix unintentional fall-throughBob Wilson2010-05-061-4/+3
| | | | | | (replacing the previous patch for the same issue). llvm-svn: 103183
* Fix unintentional fallthrough. Patch by Edmund Grimley-Evans ↵Jim Grosbach2010-05-061-1/+2
| | | | | | <Edmund.Grimley-Evans@arm.com> llvm-svn: 103181
* Fix "warning: extra ';' inside a struct or union" when building llvm with clangShantonu Sen2010-05-061-2/+2
| | | | llvm-svn: 103179
* Revert r103137, fix for $ in labels. It looks like we can't actually handle thisDaniel Dunbar2010-05-061-16/+7
| | | | | | | | | | | | at the token level. Consider the following horrible test case: a = 1 .globl $a movl ($a), %eax movl $a, %eax movl $$a, %eax llvm-svn: 103178
* Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a ↵Evan Cheng2010-05-066-24/+147
| | | | | | coalescer bug that's fixed by 103170. llvm-svn: 103172
* Fixes a coalescer bug that caused llc to crash on 2009-11-30-LiveVariablesBug.llEvan Cheng2010-05-061-4/+16
| | | | | | | | | | | with the fix in 103157. %reg1039:1<def> = VMOVS %S1<kill>, pred:14, pred:%reg0 is not coalescable since none of the super-registers of S1 are in reg1039's register class: DPR_VFP2. But it is still a legal copy instruction so it should not assert. llvm-svn: 103170
* Revert r103157, which broke test/CodeGen/ARM/2009-11-30-LiveVariablesBug.ll.Dan Gohman2010-05-061-4/+2
| | | | llvm-svn: 103163
* Revert r103156 since it was breaking the build bots.Eric Christopher2010-05-066-143/+22
| | | | | | | | | | | Reverse-merging r103156 into '.': U lib/Target/ARM/ARMInstrNEON.td U lib/Target/ARM/ARMRegisterInfo.h U lib/Target/ARM/ARMBaseRegisterInfo.cpp U lib/Target/ARM/ARMBaseInstrInfo.cpp U lib/Target/ARM/ARMRegisterInfo.td llvm-svn: 103159
* Handle the case where open(2) or close(2) is interrupted by a signal whenDan Gohman2010-05-061-11/+24
| | | | | | | | automatic syscall restarting is disabled. Also, fix the build on systems which don't define EWOULDBLOCK. llvm-svn: 103158
* Fix an obvious bug in isMoveInstr. It needs to return sub-register indices.Evan Cheng2010-05-061-2/+4
| | | | llvm-svn: 103157
* Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent pairs of Q ↵Evan Cheng2010-05-065-21/+142
| | | | | | registers. These will be used to model VLD2 / VST2 instructions in order to get substantially better codegen for them. llvm-svn: 103156
* Cosmetic changes.Evan Cheng2010-05-061-7/+7
| | | | llvm-svn: 103155
* storeRegToStackSlot has forgotten about QPR_8 register class.Evan Cheng2010-05-061-1/+2
| | | | llvm-svn: 103154
* Handle EWOULDBLOCK as EAGAIN. And add a comment explaining whyDan Gohman2010-05-061-3/+22
| | | | | | | | | EAGAIN and EWOULDBLOCK are used here. Also, handle the case where a write call is interrupted after some data has already been written. llvm-svn: 103153
* Update LabelsBeforeInsn also, when creating unknown-position labels.Dan Gohman2010-05-061-0/+5
| | | | llvm-svn: 103145
* Fix PR7054 - Assertion `Symbol->isUndefined() && "Cannot define a symbol ↵Chris Lattner2010-05-061-1/+7
| | | | | | | | | twice!"' failed. Users can write broken code that emits the same label twice with asm renaming, detect this and emit a fatal backend error instead of aborting. llvm-svn: 103140
* In bottom-up mode, defer the materialization of local constant values.Dan Gohman2010-05-061-0/+11
| | | | llvm-svn: 103139
* Add an "IsBottomUp" member function to FastISel, which will be used toDan Gohman2010-05-051-1/+2
| | | | | | support a new bottom-up mode. llvm-svn: 103138
* fix rdar://7946934 - in some limited cases, the assembler shouldChris Lattner2010-05-051-7/+16
| | | | | | allow $ at the start of a symbol name. llvm-svn: 103137
* Cleanup of ARMv7M support. Move hardware divide and Thumb2 extract/packJim Grosbach2010-05-056-24/+38
| | | | | | | instructions to subtarget features and update tests to reflect. PR5717. llvm-svn: 103136
* Emit debug info for MachineInstrs with unknown debug locations, insteadDan Gohman2010-05-051-19/+34
| | | | | | | | of just letting them inherit the debug locations of adjacent instructions. Debug info should aim to be either accurate or absent. llvm-svn: 103135
* Fix PR6520. An earlyclobber physreg must not be allocated to anything else.Jakob Stoklund Olesen2010-05-051-2/+12
| | | | llvm-svn: 103133
* Fixed a sign-extension bug in the X86 disassemblerSean Callanan2010-05-051-3/+55
| | | | | | | | that was causing PC-relative branch targets to be evaluated incorrectly. Also added support for checking operand values to the llvm-mc tester. llvm-svn: 103128
* Use getValue() for PHINodes when direct NodeMap access does not work. Devang Patel2010-05-051-1/+15
| | | | llvm-svn: 103126
* Do not pre-allocate references of D registers pairs if they are extracted ↵Evan Cheng2010-05-051-8/+28
| | | | | | from the same Q register and are in the right order. llvm-svn: 103124
* No-ops emitted for scheduling don't correspond with anything in theDan Gohman2010-05-054-5/+0
| | | | | | user's source, so don't arbitrarily assign them a debug location. llvm-svn: 103121
* Add initial support for ARMv7M subtarget and cortex-m3 cpu. Patch byJim Grosbach2010-05-056-20/+49
| | | | | | | | | Jordy <snhjordy@gmail.com>. Followup patches will add some tests and adjust to use Subtarget features for the instructions. llvm-svn: 103119
* Use the right version of "append" to combine two SmallVectors.Bob Wilson2010-05-051-1/+1
| | | | | | This fixes the compile-time regressions seen in last night's tests. llvm-svn: 103118
* MC/Mach-O: Mark absolute variable's appropriately, and add Mach-O support forDaniel Dunbar2010-05-054-4/+6
| | | | | | | writing them. - <rdar://problem/7885351> integrated assembler broken for i386 objc code llvm-svn: 103112
* MC: Reject attempts to define a variable symbol.Daniel Dunbar2010-05-053-9/+4
| | | | llvm-svn: 103111
* MC: Make setVariableValue check the redefinition condition a bit more strongly.Daniel Dunbar2010-05-051-0/+8
| | | | llvm-svn: 103110
* Move REG_SEQUENCE removal to 2addr pass.Evan Cheng2010-05-053-63/+68
| | | | llvm-svn: 103109
* Implement rdar://7415680 - Twine integer support lacks greatnessChris Lattner2010-05-051-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Microoptimize Twine's with unsigned and int to not pin their value to the stack. This saves stack space in common cases and allows mem2reg in the caller. A simple example is: void foo(const Twine &); void bar(int x) { foo("xyz: " + Twine(x)); } Before: __Z3bari: subq $40, %rsp movl %edi, 36(%rsp) leaq L_.str3(%rip), %rax leaq 36(%rsp), %rcx leaq 8(%rsp), %rdi movq %rax, 8(%rsp) movq %rcx, 16(%rsp) movb $3, 24(%rsp) movb $7, 25(%rsp) callq __Z3fooRKN4llvm5TwineE addq $40, %rsp ret After: __Z3bari: subq $24, %rsp leaq L_.str3(%rip), %rax movq %rax, (%rsp) movslq %edi, %rax movq %rax, 8(%rsp) movb $3, 16(%rsp) movb $7, 17(%rsp) leaq (%rsp), %rdi callq __Z3fooRKN4llvm5TwineE addq $24, %rsp ret It saves 16 bytes of stack and one instruction in this case. llvm-svn: 103107
* Model CONCAT_VECTORS of two 64-bit values as a REG_SEQUENCE.Evan Cheng2010-05-053-4/+38
| | | | llvm-svn: 103104
* Trim include.Evan Cheng2010-05-051-1/+0
| | | | llvm-svn: 103103
* Teach liveintervalanalysis about virtual registers which are defined by ↵Evan Cheng2010-05-051-14/+37
| | | | | | | | | | reg_sequence instructions that are formed by registers defined by distinct instructions. e.g. 80 %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0 . . . 120 %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0 llvm-svn: 103102
* MC: Rename MCSymbol::{g,s}etValue -> MCSymbol::{g,s}etVariableValue.Daniel Dunbar2010-05-054-6/+6
| | | | llvm-svn: 103095
* MC/Mach-O/x86_64: Relocations in debug sections should use local relocationsDaniel Dunbar2010-05-051-0/+11
| | | | | | | when possible. - <rdar://problem/7934873> llvm-svn: 103092
* Try again if write(2) reports an recoverable error.Benjamin Kramer2010-05-051-1/+6
| | | | | | | This should fix mysteriously crashing boost regression tests when stderr is managed by bjam (PR7043). llvm-svn: 103085
* Revert 102941, we're going to do this via attr and can justEric Christopher2010-05-051-8/+1
| | | | | | hack the code to turn it off when debugging. llvm-svn: 103083
* Combine the implementations of the core part of the SSAUpdater andBob Wilson2010-05-042-866/+211
| | | | | | MachineSSAUpdater to avoid duplicating all the code. llvm-svn: 103060
* Update comment.Eric Christopher2010-05-041-1/+1
| | | | llvm-svn: 103057
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